1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SuperSpeed DWC3 USB SoC controller 8 9maintainers: 10 - Wesley Cheng <quic_wcheng@quicinc.com> 11 12description: 13 Describes the Qualcomm USB block, based on Synopsys DWC3. 14 15select: 16 properties: 17 compatible: 18 contains: 19 const: qcom,snps-dwc3 20 required: 21 - compatible 22 23properties: 24 compatible: 25 items: 26 - enum: 27 - qcom,eliza-dwc3 28 - qcom,glymur-dwc3 29 - qcom,glymur-dwc3-mp 30 - qcom,ipq4019-dwc3 31 - qcom,ipq5018-dwc3 32 - qcom,ipq5332-dwc3 33 - qcom,ipq5424-dwc3 34 - qcom,ipq6018-dwc3 35 - qcom,ipq8064-dwc3 36 - qcom,ipq8074-dwc3 37 - qcom,ipq9574-dwc3 38 - qcom,kaanapali-dwc3 39 - qcom,milos-dwc3 40 - qcom,msm8953-dwc3 41 - qcom,msm8994-dwc3 42 - qcom,msm8996-dwc3 43 - qcom,msm8998-dwc3 44 - qcom,qcm2290-dwc3 45 - qcom,qcs404-dwc3 46 - qcom,qcs615-dwc3 47 - qcom,qcs8300-dwc3 48 - qcom,qdu1000-dwc3 49 - qcom,sa8775p-dwc3 50 - qcom,sar2130p-dwc3 51 - qcom,sc7180-dwc3 52 - qcom,sc7280-dwc3 53 - qcom,sc8180x-dwc3 54 - qcom,sc8180x-dwc3-mp 55 - qcom,sc8280xp-dwc3 56 - qcom,sc8280xp-dwc3-mp 57 - qcom,sdm660-dwc3 58 - qcom,sdm670-dwc3 59 - qcom,sdm845-dwc3 60 - qcom,sdx55-dwc3 61 - qcom,sdx65-dwc3 62 - qcom,sdx75-dwc3 63 - qcom,sm4250-dwc3 64 - qcom,sm6115-dwc3 65 - qcom,sm6125-dwc3 66 - qcom,sm6350-dwc3 67 - qcom,sm6375-dwc3 68 - qcom,sm8150-dwc3 69 - qcom,sm8250-dwc3 70 - qcom,sm8350-dwc3 71 - qcom,sm8450-dwc3 72 - qcom,sm8550-dwc3 73 - qcom,sm8650-dwc3 74 - qcom,sm8750-dwc3 75 - qcom,x1e80100-dwc3 76 - qcom,x1e80100-dwc3-mp 77 - const: qcom,snps-dwc3 78 79 reg: 80 maxItems: 1 81 82 power-domains: 83 maxItems: 1 84 85 required-opps: 86 maxItems: 1 87 88 clocks: 89 description: | 90 Several clocks are used, depending on the variant. Typical ones are:: 91 - cfg_noc:: System Config NOC clock. 92 - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= 93 60MHz for HS operation. 94 - iface:: System bus AXI clock. 95 - sleep:: Sleep clock, used for wakeup when USB3 core goes into low 96 power mode (U3). 97 - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host 98 mode. Its frequency should be 19.2MHz. 99 minItems: 1 100 maxItems: 9 101 102 clock-names: 103 minItems: 1 104 maxItems: 9 105 106 dma-coherent: true 107 108 iommus: 109 maxItems: 1 110 111 resets: 112 maxItems: 1 113 114 interconnects: 115 maxItems: 2 116 117 interconnect-names: 118 items: 119 - const: usb-ddr 120 - const: apps-usb 121 122 interrupts: 123 description: | 124 Different types of interrupts are used based on HS PHY used on target: 125 - dwc_usb3: Core DWC3 interrupt 126 - pwr_event: Used for wakeup based on other power events. 127 - hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is 128 hs_phy_irq which is not triggered by default and its 129 functionality is mutually exclusive to that of 130 {dp/dm}_hs_phy_irq and qusb2_phy_irq. 131 - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and 132 expose only a single IRQ whose behavior can be modified 133 by the QUSB2PHY_INTR_CTRL register. The required DPSE/ 134 DMSE configuration is done in QUSB2PHY_INTR_CTRL register 135 of PHY address space. 136 - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/ 137 DM pads of the SoC. These are used for wakeup 138 only on SoCs with non-QUSB2 targets with 139 exception of SDM670/SDM845/SM6350. 140 - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. 141 minItems: 3 142 maxItems: 19 143 144 interrupt-names: 145 minItems: 3 146 maxItems: 19 147 148 qcom,select-utmi-as-pipe-clk: 149 description: 150 If present, disable USB3 pipe_clk requirement. 151 Used when dwc3 operates without SSPHY and only 152 HS/FS/LS modes are supported. 153 type: boolean 154 155 wakeup-source: true 156 157required: 158 - compatible 159 - reg 160 - clocks 161 - clock-names 162 - interrupts 163 - interrupt-names 164 165allOf: 166 - $ref: snps,dwc3-common.yaml# 167 - if: 168 properties: 169 compatible: 170 contains: 171 enum: 172 - qcom,ipq4019-dwc3 173 - qcom,ipq5332-dwc3 174 then: 175 properties: 176 clocks: 177 minItems: 3 178 maxItems: 3 179 clock-names: 180 items: 181 - const: core 182 - const: sleep 183 - const: mock_utmi 184 185 - if: 186 properties: 187 compatible: 188 contains: 189 enum: 190 - qcom,ipq8064-dwc3 191 then: 192 properties: 193 clocks: 194 items: 195 - description: Master/Core clock, has to be >= 125 MHz 196 for SS operation and >= 60MHz for HS operation. 197 clock-names: 198 items: 199 - const: core 200 201 - if: 202 properties: 203 compatible: 204 contains: 205 enum: 206 - qcom,ipq5424-dwc3 207 - qcom,ipq9574-dwc3 208 - qcom,kaanapali-dwc3 209 - qcom,msm8953-dwc3 210 - qcom,msm8996-dwc3 211 - qcom,msm8998-dwc3 212 - qcom,qcs8300-dwc3 213 - qcom,sa8775p-dwc3 214 - qcom,sc7180-dwc3 215 - qcom,sc7280-dwc3 216 - qcom,sdm670-dwc3 217 - qcom,sdm845-dwc3 218 - qcom,sdx55-dwc3 219 - qcom,sdx65-dwc3 220 - qcom,sdx75-dwc3 221 - qcom,sm6350-dwc3 222 - qcom,sm8750-dwc3 223 then: 224 properties: 225 clocks: 226 minItems: 5 227 maxItems: 5 228 clock-names: 229 items: 230 - const: cfg_noc 231 - const: core 232 - const: iface 233 - const: sleep 234 - const: mock_utmi 235 236 - if: 237 properties: 238 compatible: 239 contains: 240 enum: 241 - qcom,ipq6018-dwc3 242 then: 243 properties: 244 clocks: 245 minItems: 3 246 maxItems: 4 247 clock-names: 248 oneOf: 249 - items: 250 - const: core 251 - const: sleep 252 - const: mock_utmi 253 - items: 254 - const: cfg_noc 255 - const: core 256 - const: sleep 257 - const: mock_utmi 258 259 - if: 260 properties: 261 compatible: 262 contains: 263 enum: 264 - qcom,ipq8074-dwc3 265 - qcom,qdu1000-dwc3 266 then: 267 properties: 268 clocks: 269 minItems: 4 270 maxItems: 4 271 clock-names: 272 items: 273 - const: cfg_noc 274 - const: core 275 - const: sleep 276 - const: mock_utmi 277 278 - if: 279 properties: 280 compatible: 281 contains: 282 enum: 283 - qcom,ipq5018-dwc3 284 - qcom,msm8994-dwc3 285 - qcom,qcs404-dwc3 286 then: 287 properties: 288 clocks: 289 minItems: 4 290 maxItems: 4 291 clock-names: 292 items: 293 - const: core 294 - const: iface 295 - const: sleep 296 - const: mock_utmi 297 298 - if: 299 properties: 300 compatible: 301 contains: 302 enum: 303 - qcom,sc8280xp-dwc3 304 - qcom,sc8280xp-dwc3-mp 305 - qcom,x1e80100-dwc3 306 - qcom,x1e80100-dwc3-mp 307 then: 308 properties: 309 clocks: 310 minItems: 9 311 maxItems: 9 312 clock-names: 313 items: 314 - const: cfg_noc 315 - const: core 316 - const: iface 317 - const: sleep 318 - const: mock_utmi 319 - const: noc_aggr 320 - const: noc_aggr_north 321 - const: noc_aggr_south 322 - const: noc_sys 323 324 - if: 325 properties: 326 compatible: 327 contains: 328 enum: 329 - qcom,sdm660-dwc3 330 then: 331 properties: 332 clocks: 333 minItems: 4 334 maxItems: 5 335 clock-names: 336 oneOf: 337 - items: 338 - const: cfg_noc 339 - const: core 340 - const: iface 341 - const: sleep 342 - const: mock_utmi 343 - items: 344 - const: cfg_noc 345 - const: core 346 - const: sleep 347 - const: mock_utmi 348 349 - if: 350 properties: 351 compatible: 352 contains: 353 enum: 354 - qcom,eliza-dwc3 355 - qcom,milos-dwc3 356 - qcom,qcm2290-dwc3 357 - qcom,qcs615-dwc3 358 - qcom,sar2130p-dwc3 359 - qcom,sc8180x-dwc3 360 - qcom,sc8180x-dwc3-mp 361 - qcom,sm4250-dwc3 362 - qcom,sm6115-dwc3 363 - qcom,sm6125-dwc3 364 - qcom,sm6375-dwc3 365 - qcom,sm8150-dwc3 366 - qcom,sm8250-dwc3 367 - qcom,sm8450-dwc3 368 - qcom,sm8550-dwc3 369 - qcom,sm8650-dwc3 370 then: 371 properties: 372 clocks: 373 minItems: 6 374 maxItems: 6 375 clock-names: 376 items: 377 - const: cfg_noc 378 - const: core 379 - const: iface 380 - const: sleep 381 - const: mock_utmi 382 - const: xo 383 384 - if: 385 properties: 386 compatible: 387 contains: 388 enum: 389 - qcom,sm8350-dwc3 390 then: 391 properties: 392 clocks: 393 minItems: 5 394 maxItems: 6 395 clock-names: 396 minItems: 5 397 items: 398 - const: cfg_noc 399 - const: core 400 - const: iface 401 - const: sleep 402 - const: mock_utmi 403 - const: xo 404 405 - if: 406 properties: 407 compatible: 408 contains: 409 enum: 410 - qcom,glymur-dwc3 411 - qcom,glymur-dwc3-mp 412 413 then: 414 properties: 415 clocks: 416 minItems: 7 417 maxItems: 7 418 clock-names: 419 items: 420 - const: cfg_noc 421 - const: core 422 - const: iface 423 - const: sleep 424 - const: mock_utmi 425 - const: noc_aggr_north 426 - const: noc_aggr_south 427 428 - if: 429 properties: 430 compatible: 431 contains: 432 enum: 433 - qcom,ipq6018-dwc3 434 - qcom,ipq8074-dwc3 435 - qcom,msm8953-dwc3 436 - qcom,msm8998-dwc3 437 then: 438 properties: 439 interrupts: 440 minItems: 3 441 maxItems: 4 442 interrupt-names: 443 minItems: 3 444 items: 445 - const: dwc_usb3 446 - const: pwr_event 447 - const: qusb2_phy 448 - const: ss_phy_irq 449 450 - if: 451 properties: 452 compatible: 453 contains: 454 enum: 455 - qcom,msm8994-dwc3 456 - qcom,msm8996-dwc3 457 - qcom,qcs404-dwc3 458 - qcom,sdm660-dwc3 459 - qcom,sm4250-dwc3 460 - qcom,sm6115-dwc3 461 - qcom,sm6125-dwc3 462 then: 463 properties: 464 interrupts: 465 minItems: 4 466 maxItems: 5 467 interrupt-names: 468 minItems: 4 469 items: 470 - const: dwc_usb3 471 - const: pwr_event 472 - const: qusb2_phy 473 - const: hs_phy_irq 474 - const: ss_phy_irq 475 476 - if: 477 properties: 478 compatible: 479 contains: 480 enum: 481 - qcom,ipq5018-dwc3 482 - qcom,ipq5332-dwc3 483 then: 484 properties: 485 interrupts: 486 minItems: 4 487 maxItems: 4 488 interrupt-names: 489 items: 490 - const: dwc_usb3 491 - const: pwr_event 492 - const: dp_hs_phy_irq 493 - const: dm_hs_phy_irq 494 495 - if: 496 properties: 497 compatible: 498 contains: 499 enum: 500 - qcom,ipq5424-dwc3 501 - qcom,ipq9574-dwc3 502 then: 503 properties: 504 interrupts: 505 minItems: 5 506 maxItems: 5 507 interrupt-names: 508 items: 509 - const: dwc_usb3 510 - const: pwr_event 511 - const: qusb2_phy 512 - const: dp_hs_phy_irq 513 - const: dm_hs_phy_irq 514 515 - if: 516 properties: 517 compatible: 518 contains: 519 enum: 520 - qcom,glymur-dwc3 521 - qcom,milos-dwc3 522 - qcom,x1e80100-dwc3 523 then: 524 properties: 525 interrupts: 526 minItems: 4 527 maxItems: 5 528 interrupt-names: 529 minItems: 4 530 items: 531 - const: dwc_usb3 532 - const: pwr_event 533 - const: dp_hs_phy_irq 534 - const: dm_hs_phy_irq 535 - enum: [hs_phy_irq, ss_phy_irq] 536 537 - if: 538 properties: 539 compatible: 540 contains: 541 enum: 542 - qcom,eliza-dwc3 543 - qcom,ipq4019-dwc3 544 - qcom,ipq8064-dwc3 545 - qcom,kaanapali-dwc3 546 - qcom,qcs615-dwc3 547 - qcom,qcs8300-dwc3 548 - qcom,qdu1000-dwc3 549 - qcom,sa8775p-dwc3 550 - qcom,sc7180-dwc3 551 - qcom,sc7280-dwc3 552 - qcom,sc8180x-dwc3 553 - qcom,sc8280xp-dwc3 554 - qcom,sdm670-dwc3 555 - qcom,sdm845-dwc3 556 - qcom,sdx55-dwc3 557 - qcom,sdx65-dwc3 558 - qcom,sdx75-dwc3 559 - qcom,sm6350-dwc3 560 - qcom,sm6375-dwc3 561 - qcom,sm8150-dwc3 562 - qcom,sm8250-dwc3 563 - qcom,sm8350-dwc3 564 - qcom,sm8450-dwc3 565 - qcom,sm8550-dwc3 566 - qcom,sm8650-dwc3 567 - qcom,sm8750-dwc3 568 then: 569 properties: 570 interrupts: 571 minItems: 5 572 maxItems: 6 573 interrupt-names: 574 minItems: 5 575 items: 576 - const: dwc_usb3 577 - const: pwr_event 578 - const: hs_phy_irq 579 - const: dp_hs_phy_irq 580 - const: dm_hs_phy_irq 581 - const: ss_phy_irq 582 583 - if: 584 properties: 585 compatible: 586 contains: 587 enum: 588 - qcom,glymur-dwc3-mp 589 - qcom,sc8180x-dwc3-mp 590 - qcom,x1e80100-dwc3-mp 591 then: 592 properties: 593 interrupts: 594 minItems: 11 595 maxItems: 11 596 interrupt-names: 597 items: 598 - const: dwc_usb3 599 - const: pwr_event_1 600 - const: pwr_event_2 601 - const: hs_phy_1 602 - const: hs_phy_2 603 - const: dp_hs_phy_1 604 - const: dm_hs_phy_1 605 - const: dp_hs_phy_2 606 - const: dm_hs_phy_2 607 - const: ss_phy_1 608 - const: ss_phy_2 609 610 - if: 611 properties: 612 compatible: 613 contains: 614 enum: 615 - qcom,sc8280xp-dwc3-mp 616 then: 617 properties: 618 interrupts: 619 minItems: 19 620 maxItems: 19 621 interrupt-names: 622 items: 623 - const: dwc_usb3 624 - const: pwr_event_1 625 - const: pwr_event_2 626 - const: pwr_event_3 627 - const: pwr_event_4 628 - const: hs_phy_1 629 - const: hs_phy_2 630 - const: hs_phy_3 631 - const: hs_phy_4 632 - const: dp_hs_phy_1 633 - const: dm_hs_phy_1 634 - const: dp_hs_phy_2 635 - const: dm_hs_phy_2 636 - const: dp_hs_phy_3 637 - const: dm_hs_phy_3 638 - const: dp_hs_phy_4 639 - const: dm_hs_phy_4 640 - const: ss_phy_1 641 - const: ss_phy_2 642 643unevaluatedProperties: false 644 645examples: 646 - | 647 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 648 #include <dt-bindings/interrupt-controller/arm-gic.h> 649 #include <dt-bindings/interrupt-controller/irq.h> 650 soc { 651 #address-cells = <2>; 652 #size-cells = <2>; 653 654 usb@a600000 { 655 compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; 656 reg = <0 0x0a600000 0 0x100000>; 657 658 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 659 <&gcc GCC_USB30_PRIM_MASTER_CLK>, 660 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 661 <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 662 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; 663 clock-names = "cfg_noc", 664 "core", 665 "iface", 666 "sleep", 667 "mock_utmi"; 668 669 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 670 <&gcc GCC_USB30_PRIM_MASTER_CLK>; 671 assigned-clock-rates = <19200000>, <150000000>; 672 673 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 674 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 675 <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 676 <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>, 677 <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>, 678 <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>; 679 interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq", 680 "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; 681 682 power-domains = <&gcc USB30_PRIM_GDSC>; 683 684 resets = <&gcc GCC_USB30_PRIM_BCR>; 685 686 iommus = <&apps_smmu 0x740 0>; 687 snps,dis_u2_susphy_quirk; 688 snps,dis_enblslpm_quirk; 689 phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 690 phy-names = "usb2-phy", "usb3-phy"; 691 }; 692 }; 693... 694