1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/usb/qcom,snps-dwc3.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SuperSpeed DWC3 USB SoC controller 8 9maintainers: 10 - Wesley Cheng <quic_wcheng@quicinc.com> 11 12description: 13 Describes the Qualcomm USB block, based on Synopsys DWC3. 14 15select: 16 properties: 17 compatible: 18 contains: 19 const: qcom,snps-dwc3 20 required: 21 - compatible 22 23properties: 24 compatible: 25 items: 26 - enum: 27 - qcom,ipq4019-dwc3 28 - qcom,ipq5018-dwc3 29 - qcom,ipq5332-dwc3 30 - qcom,ipq5424-dwc3 31 - qcom,ipq6018-dwc3 32 - qcom,ipq8064-dwc3 33 - qcom,ipq8074-dwc3 34 - qcom,ipq9574-dwc3 35 - qcom,milos-dwc3 36 - qcom,msm8953-dwc3 37 - qcom,msm8994-dwc3 38 - qcom,msm8996-dwc3 39 - qcom,msm8998-dwc3 40 - qcom,qcm2290-dwc3 41 - qcom,qcs404-dwc3 42 - qcom,qcs615-dwc3 43 - qcom,qcs8300-dwc3 44 - qcom,qdu1000-dwc3 45 - qcom,sa8775p-dwc3 46 - qcom,sar2130p-dwc3 47 - qcom,sc7180-dwc3 48 - qcom,sc7280-dwc3 49 - qcom,sc8180x-dwc3 50 - qcom,sc8180x-dwc3-mp 51 - qcom,sc8280xp-dwc3 52 - qcom,sc8280xp-dwc3-mp 53 - qcom,sdm660-dwc3 54 - qcom,sdm670-dwc3 55 - qcom,sdm845-dwc3 56 - qcom,sdx55-dwc3 57 - qcom,sdx65-dwc3 58 - qcom,sdx75-dwc3 59 - qcom,sm4250-dwc3 60 - qcom,sm6115-dwc3 61 - qcom,sm6125-dwc3 62 - qcom,sm6350-dwc3 63 - qcom,sm6375-dwc3 64 - qcom,sm8150-dwc3 65 - qcom,sm8250-dwc3 66 - qcom,sm8350-dwc3 67 - qcom,sm8450-dwc3 68 - qcom,sm8550-dwc3 69 - qcom,sm8650-dwc3 70 - qcom,x1e80100-dwc3 71 - const: qcom,snps-dwc3 72 73 reg: 74 maxItems: 1 75 76 power-domains: 77 maxItems: 1 78 79 required-opps: 80 maxItems: 1 81 82 clocks: 83 description: | 84 Several clocks are used, depending on the variant. Typical ones are:: 85 - cfg_noc:: System Config NOC clock. 86 - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= 87 60MHz for HS operation. 88 - iface:: System bus AXI clock. 89 - sleep:: Sleep clock, used for wakeup when USB3 core goes into low 90 power mode (U3). 91 - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host 92 mode. Its frequency should be 19.2MHz. 93 minItems: 1 94 maxItems: 9 95 96 clock-names: 97 minItems: 1 98 maxItems: 9 99 100 dma-coherent: true 101 102 iommus: 103 maxItems: 1 104 105 resets: 106 maxItems: 1 107 108 interconnects: 109 maxItems: 2 110 111 interconnect-names: 112 items: 113 - const: usb-ddr 114 - const: apps-usb 115 116 interrupts: 117 description: | 118 Different types of interrupts are used based on HS PHY used on target: 119 - dwc_usb3: Core DWC3 interrupt 120 - pwr_event: Used for wakeup based on other power events. 121 - hs_phy_irq: Apart from DP/DM/QUSB2 PHY interrupts, there is 122 hs_phy_irq which is not triggered by default and its 123 functionality is mutually exclusive to that of 124 {dp/dm}_hs_phy_irq and qusb2_phy_irq. 125 - qusb2_phy: SoCs with QUSB2 PHY do not have separate DP/DM IRQs and 126 expose only a single IRQ whose behavior can be modified 127 by the QUSB2PHY_INTR_CTRL register. The required DPSE/ 128 DMSE configuration is done in QUSB2PHY_INTR_CTRL register 129 of PHY address space. 130 - {dp/dm}_hs_phy_irq: These IRQ's directly reflect changes on the DP/ 131 DM pads of the SoC. These are used for wakeup 132 only on SoCs with non-QUSB2 targets with 133 exception of SDM670/SDM845/SM6350. 134 - ss_phy_irq: Used for remote wakeup in Super Speed mode of operation. 135 minItems: 3 136 maxItems: 19 137 138 interrupt-names: 139 minItems: 3 140 maxItems: 19 141 142 qcom,select-utmi-as-pipe-clk: 143 description: 144 If present, disable USB3 pipe_clk requirement. 145 Used when dwc3 operates without SSPHY and only 146 HS/FS/LS modes are supported. 147 type: boolean 148 149 wakeup-source: true 150 151# Required child node: 152 153required: 154 - compatible 155 - reg 156 - clocks 157 - clock-names 158 - interrupts 159 - interrupt-names 160 161allOf: 162 - $ref: snps,dwc3-common.yaml# 163 - if: 164 properties: 165 compatible: 166 contains: 167 enum: 168 - qcom,ipq4019-dwc3 169 - qcom,ipq5332-dwc3 170 then: 171 properties: 172 clocks: 173 maxItems: 3 174 clock-names: 175 items: 176 - const: core 177 - const: sleep 178 - const: mock_utmi 179 180 - if: 181 properties: 182 compatible: 183 contains: 184 enum: 185 - qcom,ipq8064-dwc3 186 then: 187 properties: 188 clocks: 189 items: 190 - description: Master/Core clock, has to be >= 125 MHz 191 for SS operation and >= 60MHz for HS operation. 192 clock-names: 193 items: 194 - const: core 195 196 - if: 197 properties: 198 compatible: 199 contains: 200 enum: 201 - qcom,ipq9574-dwc3 202 - qcom,msm8953-dwc3 203 - qcom,msm8996-dwc3 204 - qcom,msm8998-dwc3 205 - qcom,qcs8300-dwc3 206 - qcom,sa8775p-dwc3 207 - qcom,sc7180-dwc3 208 - qcom,sc7280-dwc3 209 - qcom,sdm670-dwc3 210 - qcom,sdm845-dwc3 211 - qcom,sdx55-dwc3 212 - qcom,sdx65-dwc3 213 - qcom,sdx75-dwc3 214 - qcom,sm6350-dwc3 215 then: 216 properties: 217 clocks: 218 maxItems: 5 219 clock-names: 220 items: 221 - const: cfg_noc 222 - const: core 223 - const: iface 224 - const: sleep 225 - const: mock_utmi 226 227 - if: 228 properties: 229 compatible: 230 contains: 231 enum: 232 - qcom,ipq6018-dwc3 233 then: 234 properties: 235 clocks: 236 minItems: 3 237 maxItems: 4 238 clock-names: 239 oneOf: 240 - items: 241 - const: core 242 - const: sleep 243 - const: mock_utmi 244 - items: 245 - const: cfg_noc 246 - const: core 247 - const: sleep 248 - const: mock_utmi 249 250 - if: 251 properties: 252 compatible: 253 contains: 254 enum: 255 - qcom,ipq8074-dwc3 256 - qcom,qdu1000-dwc3 257 then: 258 properties: 259 clocks: 260 maxItems: 4 261 clock-names: 262 items: 263 - const: cfg_noc 264 - const: core 265 - const: sleep 266 - const: mock_utmi 267 268 - if: 269 properties: 270 compatible: 271 contains: 272 enum: 273 - qcom,ipq5018-dwc3 274 - qcom,msm8994-dwc3 275 - qcom,qcs404-dwc3 276 then: 277 properties: 278 clocks: 279 maxItems: 4 280 clock-names: 281 items: 282 - const: core 283 - const: iface 284 - const: sleep 285 - const: mock_utmi 286 287 - if: 288 properties: 289 compatible: 290 contains: 291 enum: 292 - qcom,sc8280xp-dwc3 293 - qcom,sc8280xp-dwc3-mp 294 - qcom,x1e80100-dwc3 295 - qcom,x1e80100-dwc3-mp 296 then: 297 properties: 298 clocks: 299 maxItems: 9 300 clock-names: 301 items: 302 - const: cfg_noc 303 - const: core 304 - const: iface 305 - const: sleep 306 - const: mock_utmi 307 - const: noc_aggr 308 - const: noc_aggr_north 309 - const: noc_aggr_south 310 - const: noc_sys 311 312 - if: 313 properties: 314 compatible: 315 contains: 316 enum: 317 - qcom,sdm660-dwc3 318 then: 319 properties: 320 clocks: 321 minItems: 4 322 maxItems: 5 323 clock-names: 324 oneOf: 325 - items: 326 - const: cfg_noc 327 - const: core 328 - const: iface 329 - const: sleep 330 - const: mock_utmi 331 - items: 332 - const: cfg_noc 333 - const: core 334 - const: sleep 335 - const: mock_utmi 336 337 - if: 338 properties: 339 compatible: 340 contains: 341 enum: 342 - qcom,milos-dwc3 343 - qcom,qcm2290-dwc3 344 - qcom,qcs615-dwc3 345 - qcom,sar2130p-dwc3 346 - qcom,sc8180x-dwc3 347 - qcom,sc8180x-dwc3-mp 348 - qcom,sm6115-dwc3 349 - qcom,sm6125-dwc3 350 - qcom,sm8150-dwc3 351 - qcom,sm8250-dwc3 352 - qcom,sm8450-dwc3 353 - qcom,sm8550-dwc3 354 - qcom,sm8650-dwc3 355 then: 356 properties: 357 clocks: 358 minItems: 6 359 clock-names: 360 items: 361 - const: cfg_noc 362 - const: core 363 - const: iface 364 - const: sleep 365 - const: mock_utmi 366 - const: xo 367 368 - if: 369 properties: 370 compatible: 371 contains: 372 enum: 373 - qcom,sm8350-dwc3 374 then: 375 properties: 376 clocks: 377 minItems: 5 378 maxItems: 6 379 clock-names: 380 minItems: 5 381 items: 382 - const: cfg_noc 383 - const: core 384 - const: iface 385 - const: sleep 386 - const: mock_utmi 387 - const: xo 388 389 - if: 390 properties: 391 compatible: 392 contains: 393 enum: 394 - qcom,ipq5018-dwc3 395 - qcom,ipq6018-dwc3 396 - qcom,ipq8074-dwc3 397 - qcom,msm8953-dwc3 398 - qcom,msm8998-dwc3 399 then: 400 properties: 401 interrupts: 402 minItems: 3 403 maxItems: 4 404 interrupt-names: 405 minItems: 3 406 items: 407 - const: dwc_usb3 408 - const: pwr_event 409 - const: qusb2_phy 410 - const: ss_phy_irq 411 412 - if: 413 properties: 414 compatible: 415 contains: 416 enum: 417 - qcom,msm8996-dwc3 418 - qcom,qcs404-dwc3 419 - qcom,sdm660-dwc3 420 - qcom,sm6115-dwc3 421 - qcom,sm6125-dwc3 422 then: 423 properties: 424 interrupts: 425 minItems: 4 426 maxItems: 5 427 interrupt-names: 428 minItems: 4 429 items: 430 - const: dwc_usb3 431 - const: pwr_event 432 - const: qusb2_phy 433 - const: hs_phy_irq 434 - const: ss_phy_irq 435 436 - if: 437 properties: 438 compatible: 439 contains: 440 enum: 441 - qcom,ipq5332-dwc3 442 then: 443 properties: 444 interrupts: 445 maxItems: 4 446 interrupt-names: 447 items: 448 - const: dwc_usb3 449 - const: pwr_event 450 - const: dp_hs_phy_irq 451 - const: dm_hs_phy_irq 452 453 - if: 454 properties: 455 compatible: 456 contains: 457 enum: 458 - qcom,milos-dwc3 459 - qcom,x1e80100-dwc3 460 then: 461 properties: 462 interrupts: 463 maxItems: 5 464 interrupt-names: 465 items: 466 - const: dwc_usb3 467 - const: pwr_event 468 - const: dp_hs_phy_irq 469 - const: dm_hs_phy_irq 470 - const: ss_phy_irq 471 472 - if: 473 properties: 474 compatible: 475 contains: 476 enum: 477 - qcom,ipq4019-dwc3 478 - qcom,ipq8064-dwc3 479 - qcom,msm8994-dwc3 480 - qcom,qcs615-dwc3 481 - qcom,qcs8300-dwc3 482 - qcom,qdu1000-dwc3 483 - qcom,sa8775p-dwc3 484 - qcom,sc7180-dwc3 485 - qcom,sc7280-dwc3 486 - qcom,sc8180x-dwc3 487 - qcom,sc8280xp-dwc3 488 - qcom,sdm670-dwc3 489 - qcom,sdm845-dwc3 490 - qcom,sdx55-dwc3 491 - qcom,sdx65-dwc3 492 - qcom,sdx75-dwc3 493 - qcom,sm4250-dwc3 494 - qcom,sm6350-dwc3 495 - qcom,sm8150-dwc3 496 - qcom,sm8250-dwc3 497 - qcom,sm8350-dwc3 498 - qcom,sm8450-dwc3 499 - qcom,sm8550-dwc3 500 - qcom,sm8650-dwc3 501 then: 502 properties: 503 interrupts: 504 minItems: 5 505 maxItems: 6 506 interrupt-names: 507 minItems: 5 508 items: 509 - const: dwc_usb3 510 - const: pwr_event 511 - const: hs_phy_irq 512 - const: dp_hs_phy_irq 513 - const: dm_hs_phy_irq 514 - const: ss_phy_irq 515 516 - if: 517 properties: 518 compatible: 519 contains: 520 enum: 521 - qcom,sc8180x-dwc3-mp 522 - qcom,x1e80100-dwc3-mp 523 then: 524 properties: 525 interrupts: 526 minItems: 11 527 maxItems: 11 528 interrupt-names: 529 items: 530 - const: dwc_usb3 531 - const: pwr_event_1 532 - const: pwr_event_2 533 - const: hs_phy_1 534 - const: hs_phy_2 535 - const: dp_hs_phy_1 536 - const: dm_hs_phy_1 537 - const: dp_hs_phy_2 538 - const: dm_hs_phy_2 539 - const: ss_phy_1 540 - const: ss_phy_2 541 542 - if: 543 properties: 544 compatible: 545 contains: 546 enum: 547 - qcom,sc8280xp-dwc3-mp 548 then: 549 properties: 550 interrupts: 551 minItems: 19 552 maxItems: 19 553 interrupt-names: 554 items: 555 - const: dwc_usb3 556 - const: pwr_event_1 557 - const: pwr_event_2 558 - const: pwr_event_3 559 - const: pwr_event_4 560 - const: hs_phy_1 561 - const: hs_phy_2 562 - const: hs_phy_3 563 - const: hs_phy_4 564 - const: dp_hs_phy_1 565 - const: dm_hs_phy_1 566 - const: dp_hs_phy_2 567 - const: dm_hs_phy_2 568 - const: dp_hs_phy_3 569 - const: dm_hs_phy_3 570 - const: dp_hs_phy_4 571 - const: dm_hs_phy_4 572 - const: ss_phy_1 573 - const: ss_phy_2 574 575unevaluatedProperties: false 576 577examples: 578 - | 579 #include <dt-bindings/clock/qcom,gcc-sdm845.h> 580 #include <dt-bindings/interrupt-controller/arm-gic.h> 581 #include <dt-bindings/interrupt-controller/irq.h> 582 soc { 583 #address-cells = <2>; 584 #size-cells = <2>; 585 586 usb@a600000 { 587 compatible = "qcom,sdm845-dwc3", "qcom,snps-dwc3"; 588 reg = <0 0x0a600000 0 0x100000>; 589 590 clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 591 <&gcc GCC_USB30_PRIM_MASTER_CLK>, 592 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 593 <&gcc GCC_USB30_PRIM_SLEEP_CLK>, 594 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; 595 clock-names = "cfg_noc", 596 "core", 597 "iface", 598 "sleep", 599 "mock_utmi"; 600 601 assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 602 <&gcc GCC_USB30_PRIM_MASTER_CLK>; 603 assigned-clock-rates = <19200000>, <150000000>; 604 605 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 606 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 607 <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 608 <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>, 609 <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>, 610 <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>; 611 interrupt-names = "dwc_usb3", "pwr_event", "hs_phy_irq", 612 "dp_hs_phy_irq", "dm_hs_phy_irq", "ss_phy_irq"; 613 614 power-domains = <&gcc USB30_PRIM_GDSC>; 615 616 resets = <&gcc GCC_USB30_PRIM_BCR>; 617 618 iommus = <&apps_smmu 0x740 0>; 619 snps,dis_u2_susphy_quirk; 620 snps,dis_enblslpm_quirk; 621 phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 622 phy-names = "usb2-phy", "usb3-phy"; 623 }; 624 }; 625... 626