xref: /linux/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml (revision d4a379a52c3c2dc44366c4f6722c063a7d0de179)
1*e2725ed2SRam Kumar Dwivedi# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*e2725ed2SRam Kumar Dwivedi%YAML 1.2
3*e2725ed2SRam Kumar Dwivedi---
4*e2725ed2SRam Kumar Dwivedi$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml#
5*e2725ed2SRam Kumar Dwivedi$schema: http://devicetree.org/meta-schemas/core.yaml#
6*e2725ed2SRam Kumar Dwivedi
7*e2725ed2SRam Kumar Dwivedititle: Qualcomm SA8255P UFS Host Controller
8*e2725ed2SRam Kumar Dwivedi
9*e2725ed2SRam Kumar Dwivedimaintainers:
10*e2725ed2SRam Kumar Dwivedi  - Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
11*e2725ed2SRam Kumar Dwivedi
12*e2725ed2SRam Kumar Dwivediproperties:
13*e2725ed2SRam Kumar Dwivedi  compatible:
14*e2725ed2SRam Kumar Dwivedi    const: qcom,sa8255p-ufshc
15*e2725ed2SRam Kumar Dwivedi
16*e2725ed2SRam Kumar Dwivedi  reg:
17*e2725ed2SRam Kumar Dwivedi    maxItems: 1
18*e2725ed2SRam Kumar Dwivedi
19*e2725ed2SRam Kumar Dwivedi  interrupts:
20*e2725ed2SRam Kumar Dwivedi    maxItems: 1
21*e2725ed2SRam Kumar Dwivedi
22*e2725ed2SRam Kumar Dwivedi  iommus:
23*e2725ed2SRam Kumar Dwivedi    maxItems: 1
24*e2725ed2SRam Kumar Dwivedi
25*e2725ed2SRam Kumar Dwivedi  dma-coherent: true
26*e2725ed2SRam Kumar Dwivedi
27*e2725ed2SRam Kumar Dwivedi  power-domains:
28*e2725ed2SRam Kumar Dwivedi    maxItems: 1
29*e2725ed2SRam Kumar Dwivedi
30*e2725ed2SRam Kumar Dwivedirequired:
31*e2725ed2SRam Kumar Dwivedi  - compatible
32*e2725ed2SRam Kumar Dwivedi  - reg
33*e2725ed2SRam Kumar Dwivedi  - interrupts
34*e2725ed2SRam Kumar Dwivedi  - power-domains
35*e2725ed2SRam Kumar Dwivedi  - iommus
36*e2725ed2SRam Kumar Dwivedi  - dma-coherent
37*e2725ed2SRam Kumar Dwivedi
38*e2725ed2SRam Kumar DwivediallOf:
39*e2725ed2SRam Kumar Dwivedi  - $ref: ufs-common.yaml
40*e2725ed2SRam Kumar Dwivedi
41*e2725ed2SRam Kumar DwivediunevaluatedProperties: false
42*e2725ed2SRam Kumar Dwivedi
43*e2725ed2SRam Kumar Dwivediexamples:
44*e2725ed2SRam Kumar Dwivedi  - |
45*e2725ed2SRam Kumar Dwivedi    #include <dt-bindings/interrupt-controller/arm-gic.h>
46*e2725ed2SRam Kumar Dwivedi
47*e2725ed2SRam Kumar Dwivedi    ufshc@1d84000 {
48*e2725ed2SRam Kumar Dwivedi        compatible = "qcom,sa8255p-ufshc";
49*e2725ed2SRam Kumar Dwivedi        reg = <0x01d84000 0x3000>;
50*e2725ed2SRam Kumar Dwivedi        interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
51*e2725ed2SRam Kumar Dwivedi        lanes-per-direction = <2>;
52*e2725ed2SRam Kumar Dwivedi
53*e2725ed2SRam Kumar Dwivedi        iommus = <&apps_smmu 0x100 0x0>;
54*e2725ed2SRam Kumar Dwivedi        power-domains = <&scmi3_pd 0>;
55*e2725ed2SRam Kumar Dwivedi        dma-coherent;
56*e2725ed2SRam Kumar Dwivedi    };
57