xref: /linux/Documentation/devicetree/bindings/ufs/qcom,sa8255p-ufshc.yaml (revision d4a379a52c3c2dc44366c4f6722c063a7d0de179) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/ufs/qcom,sa8255p-ufshc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SA8255P UFS Host Controller
8
9maintainers:
10  - Ram Kumar Dwivedi <ram.dwivedi@oss.qualcomm.com>
11
12properties:
13  compatible:
14    const: qcom,sa8255p-ufshc
15
16  reg:
17    maxItems: 1
18
19  interrupts:
20    maxItems: 1
21
22  iommus:
23    maxItems: 1
24
25  dma-coherent: true
26
27  power-domains:
28    maxItems: 1
29
30required:
31  - compatible
32  - reg
33  - interrupts
34  - power-domains
35  - iommus
36  - dma-coherent
37
38allOf:
39  - $ref: ufs-common.yaml
40
41unevaluatedProperties: false
42
43examples:
44  - |
45    #include <dt-bindings/interrupt-controller/arm-gic.h>
46
47    ufshc@1d84000 {
48        compatible = "qcom,sa8255p-ufshc";
49        reg = <0x01d84000 0x3000>;
50        interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
51        lanes-per-direction = <2>;
52
53        iommus = <&apps_smmu 0x100 0x0>;
54        power-domains = <&scmi3_pd 0>;
55        dma-coherent;
56    };
57