1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/timer/fsl,gtm.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Freescale General-purpose Timers Module 8 9maintainers: 10 - J. Neuschäfer <j.ne@posteo.net> 11 12properties: 13 compatible: 14 oneOf: 15 # for SoC GTMs 16 - items: 17 - enum: 18 - fsl,mpc8308-gtm 19 - fsl,mpc8313-gtm 20 - fsl,mpc8315-gtm 21 - fsl,mpc8360-gtm 22 - const: fsl,gtm 23 24 # for QE GTMs 25 - items: 26 - enum: 27 - fsl,mpc8360-qe-gtm 28 - fsl,mpc8569-qe-gtm 29 - const: fsl,qe-gtm 30 - const: fsl,gtm 31 32 # for CPM2 GTMs (no known examples) 33 - items: 34 # - enum: 35 # - fsl,<chip>-cpm2-gtm 36 - const: fsl,cpm2-gtm 37 - const: fsl,gtm 38 39 reg: 40 maxItems: 1 41 42 interrupts: 43 items: 44 - description: Interrupt for timer 1 (e.g. GTM1 or GTM5) 45 - description: Interrupt for timer 2 (e.g. GTM2 or GTM6) 46 - description: Interrupt for timer 3 (e.g. GTM3 or GTM7) 47 - description: Interrupt for timer 4 (e.g. GTM4 or GTM8) 48 49 clock-frequency: true 50 51required: 52 - compatible 53 - reg 54 - interrupts 55 - clock-frequency 56 57additionalProperties: false 58 59examples: 60 - | 61 #include <dt-bindings/interrupt-controller/irq.h> 62 63 timer@500 { 64 compatible = "fsl,mpc8360-gtm", "fsl,gtm"; 65 reg = <0x500 0x40>; 66 interrupts = <90 IRQ_TYPE_LEVEL_LOW>, 67 <78 IRQ_TYPE_LEVEL_LOW>, 68 <84 IRQ_TYPE_LEVEL_LOW>, 69 <72 IRQ_TYPE_LEVEL_LOW>; 70 /* filled by u-boot */ 71 clock-frequency = <0>; 72 }; 73 74 - | 75 timer@440 { 76 compatible = "fsl,mpc8360-qe-gtm", "fsl,qe-gtm", "fsl,gtm"; 77 reg = <0x440 0x40>; 78 interrupts = <12>, <13>, <14>, <15>; 79 /* filled by u-boot */ 80 clock-frequency = <0>; 81 }; 82 83... 84