xref: /linux/Documentation/devicetree/bindings/thermal/fsl,imx91-tmu.yaml (revision 84318277d6334c6981ab326d4acc87c6a6ddc9b8)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/fsl,imx91-tmu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP i.MX91 Thermal
8
9maintainers:
10  - Pengfei Li <pengfei.li_1@nxp.com>
11
12description:
13  i.MX91 features a new temperature sensor. It includes programmable
14  temperature threshold comparators for both normal and privileged
15  accesses and allows a programmable measurement frequency for the
16  Periodic One-Shot Measurement mode. Additionally, it provides
17  status registers for indicating the end of measurement and threshold
18  violation events.
19
20properties:
21  compatible:
22    items:
23      - const: fsl,imx91-tmu
24
25  reg:
26    maxItems: 1
27
28  clocks:
29    maxItems: 1
30
31  interrupts:
32    items:
33      - description: Comparator 1 irq
34      - description: Comparator 2 irq
35      - description: Data ready irq
36
37  interrupt-names:
38    items:
39      - const: thr1
40      - const: thr2
41      - const: ready
42
43  nvmem-cells:
44    items:
45      - description: Phandle to the trim control 1 provided by ocotp
46      - description: Phandle to the trim control 2 provided by ocotp
47
48  nvmem-cell-names:
49    items:
50      - const: trim1
51      - const: trim2
52
53  "#thermal-sensor-cells":
54    const: 0
55
56required:
57  - compatible
58  - reg
59  - clocks
60  - interrupts
61  - interrupt-names
62
63allOf:
64  - $ref: thermal-sensor.yaml
65
66unevaluatedProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/interrupt-controller/arm-gic.h>
71    #include <dt-bindings/clock/imx93-clock.h>
72
73    thermal-sensor@44482000 {
74        compatible = "fsl,imx91-tmu";
75        reg = <0x44482000 0x1000>;
76        #thermal-sensor-cells = <0>;
77        clocks = <&clk IMX93_CLK_TMC_GATE>;
78        interrupt-parent = <&gic>;
79        interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
80                     <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
81                     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
82        interrupt-names = "thr1", "thr2", "ready";
83        nvmem-cells = <&tmu_trim1>, <&tmu_trim2>;
84        nvmem-cell-names = "trim1", "trim2";
85    };
86
87...
88