1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/nuvoton,npcm750-fiu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Nuvoton NPCM Flash Interface Unit (FIU) SPI Controller 8 9maintainers: 10 - Tomer Maimon <tmaimon77@gmail.com> 11 12allOf: 13 - $ref: /schemas/spi/spi-controller.yaml# 14 15description: | 16 NPCM FIU supports single, dual and quad communication interface. 17 18 The NPCM7XX supports three FIU modules: 19 FIU0 and FIUx support two chip selects 20 FIU3 supports four chip selects. 21 22 The NPCM8XX supports four FIU modules: 23 FIU0 and FIUx support two chip selects 24 FIU1 and FIU3 support four chip selects. 25 26 The FIU control register block is always required. The direct-mapped 27 flash window is optional because the controller can still access flash 28 through the UMA path when that mapping is not described. 29 30 Alias convention: 31 The '/aliases' node should define: 32 For NPCM7xx: fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; 33 For NPCM8xx: fiu0=&fiu0; fiu1=&fiu3; fiu2=&fiux; fiu3=&fiu1; 34 35properties: 36 compatible: 37 enum: 38 - nuvoton,npcm750-fiu # Poleg NPCM7XX 39 - nuvoton,npcm845-fiu # Arbel NPCM8XX 40 41 reg: 42 description: 43 The first resource is the FIU control register block. An optional second 44 resource describes the direct-mapped flash window used for direct 45 read/write accesses. 46 minItems: 1 47 items: 48 - description: FIU control registers 49 - description: Memory-mapped flash contents 50 51 reg-names: 52 description: 53 Resource names for the control registers and optional direct-mapped 54 flash window. 55 minItems: 1 56 items: 57 - const: control 58 - const: memory 59 60 clocks: 61 maxItems: 1 62 description: FIU reference clock. 63 64 nuvoton,spix-mode: 65 type: boolean 66 description: Enable SPIX mode for an expansion bus to an ASIC or CPLD. 67 68required: 69 - compatible 70 - reg 71 - reg-names 72 - clocks 73 74unevaluatedProperties: false 75 76examples: 77 - | 78 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h> 79 spi@fb000000 { 80 compatible = "nuvoton,npcm750-fiu"; 81 reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>; 82 reg-names = "control", "memory"; 83 #address-cells = <1>; 84 #size-cells = <0>; 85 clocks = <&clk NPCM7XX_CLK_SPI0>; 86 87 flash@0 { 88 compatible = "jedec,spi-nor"; 89 reg = <0>; 90 #address-cells = <1>; 91 #size-cells = <1>; 92 }; 93 }; 94