xref: /linux/Documentation/devicetree/bindings/spi/nuvoton,ma35d1-qspi.yaml (revision 67f8bc848ee31831336bd478e57d2f993551902e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/nuvoton,ma35d1-qspi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Nuvoton MA35D1 Quad SPI Controller
8
9maintainers:
10  - Chi-Wen Weng <cwweng@nuvoton.com>
11
12allOf:
13  - $ref: /schemas/spi/spi-controller.yaml#
14
15properties:
16  compatible:
17    const: nuvoton,ma35d1-qspi
18
19  reg:
20    maxItems: 1
21
22  interrupts:
23    maxItems: 1
24
25  clocks:
26    maxItems: 1
27
28  resets:
29    maxItems: 1
30
31  num-cs:
32    minimum: 1
33    maximum: 2
34    default: 2
35
36  cs-gpios: false
37
38required:
39  - compatible
40  - reg
41  - clocks
42  - resets
43
44unevaluatedProperties: false
45
46examples:
47  - |
48    #include <dt-bindings/interrupt-controller/arm-gic.h>
49    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
50    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
51
52    soc {
53        #address-cells = <2>;
54        #size-cells = <2>;
55
56        spi@40680000 {
57            compatible = "nuvoton,ma35d1-qspi";
58            reg = <0 0x40680000 0 0x100>;
59            interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
60            clocks = <&clk QSPI0_GATE>;
61            resets = <&sys MA35D1_RESET_QSPI0>;
62            #address-cells = <1>;
63            #size-cells = <0>;
64        };
65    };
66