xref: /linux/Documentation/devicetree/bindings/spi/cavium,octeon-3010-spi.yaml (revision 67f8bc848ee31831336bd478e57d2f993551902e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/cavium,octeon-3010-spi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Cavium, Inc. OCTEON SoC SPI master controller
8
9description:
10  The Cavium OCTEON SPI controller is an SPI master controller found in
11  OCTEON SoCs.
12
13maintainers:
14  - Rob Herring <robh@kernel.org>
15
16allOf:
17  - $ref: spi-controller.yaml#
18
19properties:
20  compatible:
21    const: cavium,octeon-3010-spi
22
23  reg:
24    maxItems: 1
25
26  interrupts:
27    maxItems: 1
28
29required:
30  - compatible
31  - reg
32  - interrupts
33
34unevaluatedProperties: false
35
36examples:
37  - |
38    soc {
39        #address-cells = <2>;
40        #size-cells = <2>;
41
42        spi@1070000001000 {
43            compatible = "cavium,octeon-3010-spi";
44            reg = <0x10700 0x00001000 0x0 0x100>;
45            interrupts = <0 58>;
46            #address-cells = <1>;
47            #size-cells = <0>;
48
49            eeprom@0 {
50                compatible = "st,m95256", "atmel,at25";
51                reg = <0>;
52                spi-max-frequency = <5000000>;
53                spi-cpha;
54                spi-cpol;
55                pagesize = <64>;
56                size = <32768>;
57                address-width = <16>;
58            };
59        };
60    };
61...
62