1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/renesas,r9a09g047-sound.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/G3E Sound Controller 8 9maintainers: 10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 11 - John Madieu <john.madieu.xa@bp.renesas.com> 12 13description: 14 The RZ/G3E (R9A09G047) sound controller is based on R-Car Sound IP 15 with extended DMA channel support (up to 5 DMACs per direction), 16 additional clock domains (47 clocks including per-SSI ADG clocks), 17 and additional reset lines (14 including SCU, ADG and Audio DMAC 18 peri-peri resets). SSI operates exclusively in BUSIF mode with 19 2-4 BUSIF channels per SSI. 20 21allOf: 22 - $ref: dai-common.yaml# 23 24properties: 25 compatible: 26 const: renesas,r9a09g047-sound 27 28 reg: 29 maxItems: 5 30 31 reg-names: 32 items: 33 - const: scu 34 - const: adg 35 - const: ssiu 36 - const: ssi 37 - const: audmapp 38 39 "#sound-dai-cells": 40 const: 1 41 42 "#clock-cells": 43 const: 0 44 45 "#address-cells": 46 const: 1 47 48 "#size-cells": 49 const: 0 50 51 clocks: 52 maxItems: 47 53 54 clock-names: 55 items: 56 - const: ssi-all 57 - const: ssi-0 58 - const: ssi-1 59 - const: ssi-2 60 - const: ssi-3 61 - const: ssi-4 62 - const: ssi-5 63 - const: ssi-6 64 - const: ssi-7 65 - const: ssi-8 66 - const: ssi-9 67 - const: src-0 68 - const: src-1 69 - const: src-2 70 - const: src-3 71 - const: src-4 72 - const: src-5 73 - const: src-6 74 - const: src-7 75 - const: src-8 76 - const: src-9 77 - const: mix-0 78 - const: mix-1 79 - const: ctu-0 80 - const: ctu-1 81 - const: dvc-0 82 - const: dvc-1 83 - const: audio-clka 84 - const: audio-clkb 85 - const: audio-clkc 86 - const: audio-clki 87 - const: ssif_supply 88 - const: scu 89 - const: scu_x2 90 - const: scu_supply 91 - const: adg-ssi-0 92 - const: adg-ssi-1 93 - const: adg-ssi-2 94 - const: adg-ssi-3 95 - const: adg-ssi-4 96 - const: adg-ssi-5 97 - const: adg-ssi-6 98 - const: adg-ssi-7 99 - const: adg-ssi-8 100 - const: adg-ssi-9 101 - const: audmapp 102 - const: adg 103 104 power-domains: 105 maxItems: 1 106 107 resets: 108 maxItems: 14 109 110 reset-names: 111 items: 112 - const: ssi-all 113 - const: ssi-0 114 - const: ssi-1 115 - const: ssi-2 116 - const: ssi-3 117 - const: ssi-4 118 - const: ssi-5 119 - const: ssi-6 120 - const: ssi-7 121 - const: ssi-8 122 - const: ssi-9 123 - const: scu 124 - const: adg 125 - const: audmapp 126 127 dvc: 128 type: object 129 additionalProperties: false 130 131 patternProperties: 132 "^dvc-[0-1]$": 133 type: object 134 additionalProperties: false 135 136 properties: 137 dmas: 138 maxItems: 5 139 description: 140 List of references to DMA specifiers, one per DMA 141 controller, all for the transmission direction 142 (DVC is playback-only). The dma-engine core falls 143 through the list to find a free channel. 144 145 dma-names: 146 maxItems: 5 147 allOf: 148 - items: 149 enum: 150 - tx 151 152 required: 153 - dmas 154 - dma-names 155 156 mix: 157 type: object 158 additionalProperties: false 159 description: 160 Per-channel Mixer (MIX) sub-nodes. Each mix-N node has no 161 properties of its own. It exists so the driver can enumerate 162 the MIX instances and so that DT labels can be attached to it 163 for the dai/playback/capture phandle routing arrays. 164 165 patternProperties: 166 "^mix-[0-1]$": 167 type: object 168 additionalProperties: false 169 170 ctu: 171 type: object 172 additionalProperties: false 173 description: 174 Per-channel Channel Transfer Unit (CTU) sub-nodes. Each ctu-N 175 node has no properties of its own. It exists so the driver 176 can enumerate the CTU instances and so that DT labels can be 177 attached to it for the dai/playback/capture phandle routing arrays. 178 179 patternProperties: 180 "^ctu-[0-7]$": 181 type: object 182 additionalProperties: false 183 184 src: 185 type: object 186 additionalProperties: false 187 188 patternProperties: 189 "^src-[0-9]$": 190 type: object 191 additionalProperties: false 192 193 properties: 194 interrupts: 195 maxItems: 1 196 197 dmas: 198 maxItems: 10 199 description: 200 Must contain a list of pairs of references to DMA 201 specifiers, one for transmission and one for reception, 202 repeated for each DMA controller. The dma-engine core 203 falls through the list to find a free channel. 204 205 dma-names: 206 maxItems: 10 207 allOf: 208 - items: 209 enum: 210 - tx 211 - rx 212 213 ssiu: 214 type: object 215 additionalProperties: false 216 217 patternProperties: 218 "^ssiu-[0-9]+$": 219 type: object 220 additionalProperties: false 221 222 properties: 223 dmas: 224 maxItems: 10 225 description: 226 Must contain a list of pairs of references to DMA 227 specifiers, one for transmission and one for reception, 228 repeated for each DMA controller. The dma-engine core 229 falls through the list to find a free channel. 230 231 dma-names: 232 maxItems: 10 233 allOf: 234 - items: 235 enum: 236 - tx 237 - rx 238 239 required: 240 - dmas 241 - dma-names 242 243 ssi: 244 type: object 245 additionalProperties: false 246 247 patternProperties: 248 "^ssi-[0-9]$": 249 type: object 250 additionalProperties: false 251 252 properties: 253 interrupts: 254 maxItems: 1 255 256 shared-pin: 257 description: Shared clock pin. 258 $ref: /schemas/types.yaml#/definitions/flag 259 260 required: 261 - interrupts 262 263 ports: 264 $ref: audio-graph-port.yaml#/definitions/port-base 265 unevaluatedProperties: false 266 patternProperties: 267 '^port@[0-9a-f]+$': 268 $ref: audio-graph-port.yaml#/definitions/port-base 269 unevaluatedProperties: false 270 properties: 271 reg: 272 maxItems: 1 273 endpoint: 274 $ref: audio-graph-port.yaml#/definitions/endpoint-base 275 unevaluatedProperties: false 276 properties: 277 playback: 278 $ref: /schemas/types.yaml#/definitions/phandle-array 279 description: 280 Ordered list of phandles to the in-SoC modules used 281 by this DAI in the playback direction. Each phandle 282 must reference one of the ssi-N, src-N, ctu-N, 283 mix-N or dvc-N sub-nodes of the parent sound 284 controller. The list order is the pipeline order 285 from CPU to off-SoC endpoint. 286 capture: 287 $ref: /schemas/types.yaml#/definitions/phandle-array 288 description: 289 Ordered list of phandles to the in-SoC modules used 290 by this DAI in the capture direction. Each phandle 291 must reference one of the ssi-N, src-N, ctu-N, 292 mix-N or dvc-N sub-nodes of the parent sound 293 controller. The list order is the pipeline order 294 from off-SoC endpoint to CPU. 295 296required: 297 - compatible 298 - reg 299 - reg-names 300 - "#sound-dai-cells" 301 - "#clock-cells" 302 - clocks 303 - clock-names 304 - resets 305 - reset-names 306 307unevaluatedProperties: false 308 309examples: 310 - | 311 #include <dt-bindings/interrupt-controller/arm-gic.h> 312 313 sound@13c00000 { 314 #sound-dai-cells = <1>; 315 #clock-cells = <0>; 316 compatible = "renesas,r9a09g047-sound"; 317 reg = <0x13c00000 0x10000>, 318 <0x13c20000 0x10000>, 319 <0x13c30000 0x1000>, 320 <0x13c31000 0x1f000>, 321 <0x13c50000 0x10000>; 322 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 323 clocks = <&cpg 245>, 324 <&cpg 385>, <&cpg 386>, 325 <&cpg 387>, <&cpg 388>, 326 <&cpg 389>, <&cpg 390>, 327 <&cpg 391>, <&cpg 392>, 328 <&cpg 393>, <&cpg 394>, 329 <&cpg 372>, <&cpg 373>, 330 <&cpg 374>, <&cpg 375>, 331 <&cpg 376>, <&cpg 377>, 332 <&cpg 378>, <&cpg 379>, 333 <&cpg 380>, <&cpg 381>, 334 <&cpg 370>, <&cpg 371>, 335 <&cpg 370>, <&cpg 371>, 336 <&cpg 368>, <&cpg 369>, 337 <&cpg 251>, <&cpg 252>, 338 <&cpg 253>, <&cpg 250>, 339 <&cpg 384>, 340 <&cpg 246>, <&cpg 247>, 341 <&cpg 382>, 342 <&cpg 352>, <&cpg 353>, 343 <&cpg 354>, <&cpg 355>, 344 <&cpg 356>, <&cpg 357>, 345 <&cpg 358>, <&cpg 359>, 346 <&cpg 360>, <&cpg 361>, 347 <&cpg 248>, <&cpg 249>; 348 clock-names = "ssi-all", 349 "ssi-0", "ssi-1", 350 "ssi-2", "ssi-3", 351 "ssi-4", "ssi-5", 352 "ssi-6", "ssi-7", 353 "ssi-8", "ssi-9", 354 "src-0", "src-1", 355 "src-2", "src-3", 356 "src-4", "src-5", 357 "src-6", "src-7", 358 "src-8", "src-9", 359 "mix-0", "mix-1", 360 "ctu-0", "ctu-1", 361 "dvc-0", "dvc-1", 362 "audio-clka", "audio-clkb", 363 "audio-clkc", "audio-clki", 364 "ssif_supply", 365 "scu", "scu_x2", 366 "scu_supply", 367 "adg-ssi-0", "adg-ssi-1", 368 "adg-ssi-2", "adg-ssi-3", 369 "adg-ssi-4", "adg-ssi-5", 370 "adg-ssi-6", "adg-ssi-7", 371 "adg-ssi-8", "adg-ssi-9", 372 "audmapp", "adg"; 373 power-domains = <&cpg>; 374 resets = <&cpg 225>, 375 <&cpg 226>, <&cpg 227>, 376 <&cpg 228>, <&cpg 229>, 377 <&cpg 230>, <&cpg 231>, 378 <&cpg 232>, <&cpg 233>, 379 <&cpg 234>, <&cpg 235>, 380 <&cpg 236>, <&cpg 238>, <&cpg 237>; 381 reset-names = "ssi-all", 382 "ssi-0", "ssi-1", 383 "ssi-2", "ssi-3", 384 "ssi-4", "ssi-5", 385 "ssi-6", "ssi-7", 386 "ssi-8", "ssi-9", 387 "scu", "adg", 388 "audmapp"; 389 390 ctu { 391 ctu-0 { }; 392 ctu-1 { }; 393 ctu-2 { }; 394 ctu-3 { }; 395 ctu-4 { }; 396 ctu-5 { }; 397 ctu-6 { }; 398 ctu-7 { }; 399 }; 400 401 dvc { 402 dvc0: dvc-0 { 403 dmas = <&dmac0 0x1db3>, <&dmac1 0x1db3>, 404 <&dmac2 0x1db3>, <&dmac3 0x1db3>, 405 <&dmac4 0x1db3>; 406 dma-names = "tx", "tx", "tx", "tx", "tx"; 407 }; 408 dvc1: dvc-1 { 409 dmas = <&dmac0 0x1db4>, <&dmac1 0x1db4>, 410 <&dmac2 0x1db4>, <&dmac3 0x1db4>, 411 <&dmac4 0x1db4>; 412 dma-names = "tx", "tx", "tx", "tx", "tx"; 413 }; 414 }; 415 416 mix { 417 mix-0 { }; 418 mix-1 { }; 419 }; 420 421 src { 422 src0: src-0 { 423 interrupts = <GIC_SPI 902 IRQ_TYPE_LEVEL_HIGH>; 424 dmas = <&dmac0 0x1d9f>, <&dmac0 0x1da9>, 425 <&dmac1 0x1d9f>, <&dmac1 0x1da9>, 426 <&dmac2 0x1d9f>, <&dmac2 0x1da9>, 427 <&dmac3 0x1d9f>, <&dmac3 0x1da9>, 428 <&dmac4 0x1d9f>, <&dmac4 0x1da9>; 429 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 430 "rx", "tx", "rx", "tx"; 431 }; 432 src1: src-1 { 433 interrupts = <GIC_SPI 903 IRQ_TYPE_LEVEL_HIGH>; 434 dmas = <&dmac0 0x1da0>, <&dmac0 0x1daa>, 435 <&dmac1 0x1da0>, <&dmac1 0x1daa>, 436 <&dmac2 0x1da0>, <&dmac2 0x1daa>, 437 <&dmac3 0x1da0>, <&dmac3 0x1daa>, 438 <&dmac4 0x1da0>, <&dmac4 0x1daa>; 439 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 440 "rx", "tx", "rx", "tx"; 441 }; 442 src-2 { 443 interrupts = <GIC_SPI 904 IRQ_TYPE_LEVEL_HIGH>; 444 dmas = <&dmac0 0x1da1>, <&dmac0 0x1dab>, 445 <&dmac1 0x1da1>, <&dmac1 0x1dab>, 446 <&dmac2 0x1da1>, <&dmac2 0x1dab>, 447 <&dmac3 0x1da1>, <&dmac3 0x1dab>, 448 <&dmac4 0x1da1>, <&dmac4 0x1dab>; 449 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 450 "rx", "tx", "rx", "tx"; 451 }; 452 src-3 { 453 interrupts = <GIC_SPI 905 IRQ_TYPE_LEVEL_HIGH>; 454 dmas = <&dmac0 0x1da2>, <&dmac0 0x1dac>, 455 <&dmac1 0x1da2>, <&dmac1 0x1dac>, 456 <&dmac2 0x1da2>, <&dmac2 0x1dac>, 457 <&dmac3 0x1da2>, <&dmac3 0x1dac>, 458 <&dmac4 0x1da2>, <&dmac4 0x1dac>; 459 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 460 "rx", "tx", "rx", "tx"; 461 }; 462 src-4 { 463 interrupts = <GIC_SPI 906 IRQ_TYPE_LEVEL_HIGH>; 464 dmas = <&dmac0 0x1da3>, <&dmac0 0x1dad>, 465 <&dmac1 0x1da3>, <&dmac1 0x1dad>, 466 <&dmac2 0x1da3>, <&dmac2 0x1dad>, 467 <&dmac3 0x1da3>, <&dmac3 0x1dad>, 468 <&dmac4 0x1da3>, <&dmac4 0x1dad>; 469 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 470 "rx", "tx", "rx", "tx"; 471 }; 472 src-5 { 473 interrupts = <GIC_SPI 907 IRQ_TYPE_LEVEL_HIGH>; 474 dmas = <&dmac0 0x1da4>, <&dmac0 0x1dae>, 475 <&dmac1 0x1da4>, <&dmac1 0x1dae>, 476 <&dmac2 0x1da4>, <&dmac2 0x1dae>, 477 <&dmac3 0x1da4>, <&dmac3 0x1dae>, 478 <&dmac4 0x1da4>, <&dmac4 0x1dae>; 479 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 480 "rx", "tx", "rx", "tx"; 481 }; 482 src-6 { 483 interrupts = <GIC_SPI 908 IRQ_TYPE_LEVEL_HIGH>; 484 dmas = <&dmac0 0x1da5>, <&dmac0 0x1daf>, 485 <&dmac1 0x1da5>, <&dmac1 0x1daf>, 486 <&dmac2 0x1da5>, <&dmac2 0x1daf>, 487 <&dmac3 0x1da5>, <&dmac3 0x1daf>, 488 <&dmac4 0x1da5>, <&dmac4 0x1daf>; 489 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 490 "rx", "tx", "rx", "tx"; 491 }; 492 src-7 { 493 interrupts = <GIC_SPI 909 IRQ_TYPE_LEVEL_HIGH>; 494 dmas = <&dmac0 0x1da6>, <&dmac0 0x1db0>, 495 <&dmac1 0x1da6>, <&dmac1 0x1db0>, 496 <&dmac2 0x1da6>, <&dmac2 0x1db0>, 497 <&dmac3 0x1da6>, <&dmac3 0x1db0>, 498 <&dmac4 0x1da6>, <&dmac4 0x1db0>; 499 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 500 "rx", "tx", "rx", "tx"; 501 }; 502 src-8 { 503 interrupts = <GIC_SPI 910 IRQ_TYPE_LEVEL_HIGH>; 504 dmas = <&dmac0 0x1da7>, <&dmac0 0x1db1>, 505 <&dmac1 0x1da7>, <&dmac1 0x1db1>, 506 <&dmac2 0x1da7>, <&dmac2 0x1db1>, 507 <&dmac3 0x1da7>, <&dmac3 0x1db1>, 508 <&dmac4 0x1da7>, <&dmac4 0x1db1>; 509 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 510 "rx", "tx", "rx", "tx"; 511 }; 512 src-9 { 513 interrupts = <GIC_SPI 911 IRQ_TYPE_LEVEL_HIGH>; 514 dmas = <&dmac0 0x1da8>, <&dmac0 0x1db2>, 515 <&dmac1 0x1da8>, <&dmac1 0x1db2>, 516 <&dmac2 0x1da8>, <&dmac2 0x1db2>, 517 <&dmac3 0x1da8>, <&dmac3 0x1db2>, 518 <&dmac4 0x1da8>, <&dmac4 0x1db2>; 519 dma-names = "rx", "tx", "rx", "tx", "rx", "tx", 520 "rx", "tx", "rx", "tx"; 521 }; 522 }; 523 524 ssi { 525 ssi-0 { 526 interrupts = <GIC_SPI 889 IRQ_TYPE_LEVEL_HIGH>; 527 }; 528 ssi-1 { 529 interrupts = <GIC_SPI 890 IRQ_TYPE_LEVEL_HIGH>; 530 }; 531 ssi-2 { 532 interrupts = <GIC_SPI 891 IRQ_TYPE_LEVEL_HIGH>; 533 }; 534 ssi3: ssi-3 { 535 interrupts = <GIC_SPI 892 IRQ_TYPE_LEVEL_HIGH>; 536 }; 537 ssi4: ssi-4 { 538 interrupts = <GIC_SPI 893 IRQ_TYPE_LEVEL_HIGH>; 539 shared-pin; 540 }; 541 ssi-5 { 542 interrupts = <GIC_SPI 894 IRQ_TYPE_LEVEL_HIGH>; 543 }; 544 ssi-6 { 545 interrupts = <GIC_SPI 895 IRQ_TYPE_LEVEL_HIGH>; 546 }; 547 ssi-7 { 548 interrupts = <GIC_SPI 896 IRQ_TYPE_LEVEL_HIGH>; 549 }; 550 ssi-8 { 551 interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>; 552 }; 553 ssi-9 { 554 interrupts = <GIC_SPI 898 IRQ_TYPE_LEVEL_HIGH>; 555 }; 556 }; 557 558 ssiu { 559 ssiu-0 { 560 dmas = <&dmac0 0x1d61>, <&dmac0 0x1d62>, 561 <&dmac1 0x1d61>, <&dmac1 0x1d62>, 562 <&dmac2 0x1d61>, <&dmac2 0x1d62>, 563 <&dmac3 0x1d61>, <&dmac3 0x1d62>, 564 <&dmac4 0x1d61>, <&dmac4 0x1d62>; 565 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 566 }; 567 ssiu-1 { 568 dmas = <&dmac0 0x1d63>, <&dmac0 0x1d64>, 569 <&dmac1 0x1d63>, <&dmac1 0x1d64>, 570 <&dmac2 0x1d63>, <&dmac2 0x1d64>, 571 <&dmac3 0x1d63>, <&dmac3 0x1d64>, 572 <&dmac4 0x1d63>, <&dmac4 0x1d64>; 573 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 574 }; 575 ssiu-2 { 576 dmas = <&dmac0 0x1d65>, <&dmac0 0x1d66>, 577 <&dmac1 0x1d65>, <&dmac1 0x1d66>, 578 <&dmac2 0x1d65>, <&dmac2 0x1d66>, 579 <&dmac3 0x1d65>, <&dmac3 0x1d66>, 580 <&dmac4 0x1d65>, <&dmac4 0x1d66>; 581 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 582 }; 583 ssiu-3 { 584 dmas = <&dmac0 0x1d67>, <&dmac0 0x1d68>, 585 <&dmac1 0x1d67>, <&dmac1 0x1d68>, 586 <&dmac2 0x1d67>, <&dmac2 0x1d68>, 587 <&dmac3 0x1d67>, <&dmac3 0x1d68>, 588 <&dmac4 0x1d67>, <&dmac4 0x1d68>; 589 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 590 }; 591 ssiu-4 { 592 dmas = <&dmac0 0x1d69>, <&dmac0 0x1d6a>, 593 <&dmac1 0x1d69>, <&dmac1 0x1d6a>, 594 <&dmac2 0x1d69>, <&dmac2 0x1d6a>, 595 <&dmac3 0x1d69>, <&dmac3 0x1d6a>, 596 <&dmac4 0x1d69>, <&dmac4 0x1d6a>; 597 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 598 }; 599 ssiu-5 { 600 dmas = <&dmac0 0x1d6b>, <&dmac0 0x1d6c>, 601 <&dmac1 0x1d6b>, <&dmac1 0x1d6c>, 602 <&dmac2 0x1d6b>, <&dmac2 0x1d6c>, 603 <&dmac3 0x1d6b>, <&dmac3 0x1d6c>, 604 <&dmac4 0x1d6b>, <&dmac4 0x1d6c>; 605 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 606 }; 607 ssiu-6 { 608 dmas = <&dmac0 0x1d6d>, <&dmac0 0x1d6e>, 609 <&dmac1 0x1d6d>, <&dmac1 0x1d6e>, 610 <&dmac2 0x1d6d>, <&dmac2 0x1d6e>, 611 <&dmac3 0x1d6d>, <&dmac3 0x1d6e>, 612 <&dmac4 0x1d6d>, <&dmac4 0x1d6e>; 613 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 614 }; 615 ssiu-7 { 616 dmas = <&dmac0 0x1d6f>, <&dmac0 0x1d70>, 617 <&dmac1 0x1d6f>, <&dmac1 0x1d70>, 618 <&dmac2 0x1d6f>, <&dmac2 0x1d70>, 619 <&dmac3 0x1d6f>, <&dmac3 0x1d70>, 620 <&dmac4 0x1d6f>, <&dmac4 0x1d70>; 621 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 622 }; 623 ssiu-8 { 624 dmas = <&dmac0 0x1d71>, <&dmac0 0x1d72>, 625 <&dmac1 0x1d71>, <&dmac1 0x1d72>, 626 <&dmac2 0x1d71>, <&dmac2 0x1d72>, 627 <&dmac3 0x1d71>, <&dmac3 0x1d72>, 628 <&dmac4 0x1d71>, <&dmac4 0x1d72>; 629 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 630 }; 631 ssiu-9 { 632 dmas = <&dmac0 0x1d73>, <&dmac0 0x1d74>, 633 <&dmac1 0x1d73>, <&dmac1 0x1d74>, 634 <&dmac2 0x1d73>, <&dmac2 0x1d74>, 635 <&dmac3 0x1d73>, <&dmac3 0x1d74>, 636 <&dmac4 0x1d73>, <&dmac4 0x1d74>; 637 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 638 }; 639 ssiu-10 { 640 dmas = <&dmac0 0x1d75>, <&dmac0 0x1d76>, 641 <&dmac1 0x1d75>, <&dmac1 0x1d76>, 642 <&dmac2 0x1d75>, <&dmac2 0x1d76>, 643 <&dmac3 0x1d75>, <&dmac3 0x1d76>, 644 <&dmac4 0x1d75>, <&dmac4 0x1d76>; 645 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 646 }; 647 ssiu-11 { 648 dmas = <&dmac0 0x1d77>, <&dmac0 0x1d78>, 649 <&dmac1 0x1d77>, <&dmac1 0x1d78>, 650 <&dmac2 0x1d77>, <&dmac2 0x1d78>, 651 <&dmac3 0x1d77>, <&dmac3 0x1d78>, 652 <&dmac4 0x1d77>, <&dmac4 0x1d78>; 653 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 654 }; 655 ssiu-12 { 656 dmas = <&dmac0 0x1d79>, <&dmac0 0x1d7a>, 657 <&dmac1 0x1d79>, <&dmac1 0x1d7a>, 658 <&dmac2 0x1d79>, <&dmac2 0x1d7a>, 659 <&dmac3 0x1d79>, <&dmac3 0x1d7a>, 660 <&dmac4 0x1d79>, <&dmac4 0x1d7a>; 661 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 662 }; 663 ssiu-13 { 664 dmas = <&dmac0 0x1d7b>, <&dmac0 0x1d7c>, 665 <&dmac1 0x1d7b>, <&dmac1 0x1d7c>, 666 <&dmac2 0x1d7b>, <&dmac2 0x1d7c>, 667 <&dmac3 0x1d7b>, <&dmac3 0x1d7c>, 668 <&dmac4 0x1d7b>, <&dmac4 0x1d7c>; 669 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 670 }; 671 ssiu-14 { 672 dmas = <&dmac0 0x1d7d>, <&dmac0 0x1d7e>, 673 <&dmac1 0x1d7d>, <&dmac1 0x1d7e>, 674 <&dmac2 0x1d7d>, <&dmac2 0x1d7e>, 675 <&dmac3 0x1d7d>, <&dmac3 0x1d7e>, 676 <&dmac4 0x1d7d>, <&dmac4 0x1d7e>; 677 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 678 }; 679 ssiu-15 { 680 dmas = <&dmac0 0x1d7f>, <&dmac0 0x1d80>, 681 <&dmac1 0x1d7f>, <&dmac1 0x1d80>, 682 <&dmac2 0x1d7f>, <&dmac2 0x1d80>, 683 <&dmac3 0x1d7f>, <&dmac3 0x1d80>, 684 <&dmac4 0x1d7f>, <&dmac4 0x1d80>; 685 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 686 }; 687 ssiu-16 { 688 dmas = <&dmac0 0x1d81>, <&dmac0 0x1d82>, 689 <&dmac1 0x1d81>, <&dmac1 0x1d82>, 690 <&dmac2 0x1d81>, <&dmac2 0x1d82>, 691 <&dmac3 0x1d81>, <&dmac3 0x1d82>, 692 <&dmac4 0x1d81>, <&dmac4 0x1d82>; 693 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 694 }; 695 ssiu-17 { 696 dmas = <&dmac0 0x1d83>, <&dmac0 0x1d84>, 697 <&dmac1 0x1d83>, <&dmac1 0x1d84>, 698 <&dmac2 0x1d83>, <&dmac2 0x1d84>, 699 <&dmac3 0x1d83>, <&dmac3 0x1d84>, 700 <&dmac4 0x1d83>, <&dmac4 0x1d84>; 701 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 702 }; 703 ssiu-18 { 704 dmas = <&dmac0 0x1d85>, <&dmac0 0x1d86>, 705 <&dmac1 0x1d85>, <&dmac1 0x1d86>, 706 <&dmac2 0x1d85>, <&dmac2 0x1d86>, 707 <&dmac3 0x1d85>, <&dmac3 0x1d86>, 708 <&dmac4 0x1d85>, <&dmac4 0x1d86>; 709 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 710 }; 711 ssiu-19 { 712 dmas = <&dmac0 0x1d87>, <&dmac0 0x1d88>, 713 <&dmac1 0x1d87>, <&dmac1 0x1d88>, 714 <&dmac2 0x1d87>, <&dmac2 0x1d88>, 715 <&dmac3 0x1d87>, <&dmac3 0x1d88>, 716 <&dmac4 0x1d87>, <&dmac4 0x1d88>; 717 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 718 }; 719 ssiu-20 { 720 dmas = <&dmac0 0x1d89>, <&dmac0 0x1d8a>, 721 <&dmac1 0x1d89>, <&dmac1 0x1d8a>, 722 <&dmac2 0x1d89>, <&dmac2 0x1d8a>, 723 <&dmac3 0x1d89>, <&dmac3 0x1d8a>, 724 <&dmac4 0x1d89>, <&dmac4 0x1d8a>; 725 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 726 }; 727 ssiu-21 { 728 dmas = <&dmac0 0x1d8b>, <&dmac0 0x1d8c>, 729 <&dmac1 0x1d8b>, <&dmac1 0x1d8c>, 730 <&dmac2 0x1d8b>, <&dmac2 0x1d8c>, 731 <&dmac3 0x1d8b>, <&dmac3 0x1d8c>, 732 <&dmac4 0x1d8b>, <&dmac4 0x1d8c>; 733 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 734 }; 735 ssiu-22 { 736 dmas = <&dmac0 0x1d8d>, <&dmac0 0x1d8e>, 737 <&dmac1 0x1d8d>, <&dmac1 0x1d8e>, 738 <&dmac2 0x1d8d>, <&dmac2 0x1d8e>, 739 <&dmac3 0x1d8d>, <&dmac3 0x1d8e>, 740 <&dmac4 0x1d8d>, <&dmac4 0x1d8e>; 741 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 742 }; 743 ssiu-23 { 744 dmas = <&dmac0 0x1d8f>, <&dmac0 0x1d90>, 745 <&dmac1 0x1d8f>, <&dmac1 0x1d90>, 746 <&dmac2 0x1d8f>, <&dmac2 0x1d90>, 747 <&dmac3 0x1d8f>, <&dmac3 0x1d90>, 748 <&dmac4 0x1d8f>, <&dmac4 0x1d90>; 749 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 750 }; 751 ssiu-24 { 752 dmas = <&dmac0 0x1d91>, <&dmac0 0x1d92>, 753 <&dmac1 0x1d91>, <&dmac1 0x1d92>, 754 <&dmac2 0x1d91>, <&dmac2 0x1d92>, 755 <&dmac3 0x1d91>, <&dmac3 0x1d92>, 756 <&dmac4 0x1d91>, <&dmac4 0x1d92>; 757 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 758 }; 759 ssiu-25 { 760 dmas = <&dmac0 0x1d93>, <&dmac0 0x1d94>, 761 <&dmac1 0x1d93>, <&dmac1 0x1d94>, 762 <&dmac2 0x1d93>, <&dmac2 0x1d94>, 763 <&dmac3 0x1d93>, <&dmac3 0x1d94>, 764 <&dmac4 0x1d93>, <&dmac4 0x1d94>; 765 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 766 }; 767 ssiu-26 { 768 dmas = <&dmac0 0x1d95>, <&dmac0 0x1d96>, 769 <&dmac1 0x1d95>, <&dmac1 0x1d96>, 770 <&dmac2 0x1d95>, <&dmac2 0x1d96>, 771 <&dmac3 0x1d95>, <&dmac3 0x1d96>, 772 <&dmac4 0x1d95>, <&dmac4 0x1d96>; 773 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 774 }; 775 ssiu-27 { 776 dmas = <&dmac0 0x1d97>, <&dmac0 0x1d98>, 777 <&dmac1 0x1d97>, <&dmac1 0x1d98>, 778 <&dmac2 0x1d97>, <&dmac2 0x1d98>, 779 <&dmac3 0x1d97>, <&dmac3 0x1d98>, 780 <&dmac4 0x1d97>, <&dmac4 0x1d98>; 781 dma-names = "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx", "tx", "rx"; 782 }; 783 }; 784 785 ports { 786 #address-cells = <1>; 787 #size-cells = <0>; 788 port@0 { 789 reg = <0>; 790 rsnd_endpoint0: endpoint { 791 remote-endpoint = <&codec_endpoint>; 792 dai-format = "i2s"; 793 bitclock-master = <&rsnd_endpoint0>; 794 frame-master = <&rsnd_endpoint0>; 795 playback = <&ssi3>, <&src1>, <&dvc1>; 796 capture = <&ssi4>, <&src0>, <&dvc0>; 797 }; 798 }; 799 }; 800 }; 801