1*012dfa0cSLuca Leonardo Scorcia# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*012dfa0cSLuca Leonardo Scorcia%YAML 1.2 3*012dfa0cSLuca Leonardo Scorcia--- 4*012dfa0cSLuca Leonardo Scorcia$id: http://devicetree.org/schemas/sound/mediatek,mtk-btcvsd-snd.yaml# 5*012dfa0cSLuca Leonardo Scorcia$schema: http://devicetree.org/meta-schemas/core.yaml# 6*012dfa0cSLuca Leonardo Scorcia 7*012dfa0cSLuca Leonardo Scorciatitle: Mediatek ALSA BT SCO CVSD/MSBC 8*012dfa0cSLuca Leonardo Scorcia 9*012dfa0cSLuca Leonardo Scorciamaintainers: 10*012dfa0cSLuca Leonardo Scorcia - Luca Leonardo Scorcia <l.scorcia@gmail.com> 11*012dfa0cSLuca Leonardo Scorcia 12*012dfa0cSLuca Leonardo Scorciaproperties: 13*012dfa0cSLuca Leonardo Scorcia compatible: 14*012dfa0cSLuca Leonardo Scorcia const: mediatek,mtk-btcvsd-snd 15*012dfa0cSLuca Leonardo Scorcia 16*012dfa0cSLuca Leonardo Scorcia reg: 17*012dfa0cSLuca Leonardo Scorcia items: 18*012dfa0cSLuca Leonardo Scorcia - description: PKV region 19*012dfa0cSLuca Leonardo Scorcia - description: SRAM_BANK2 region 20*012dfa0cSLuca Leonardo Scorcia 21*012dfa0cSLuca Leonardo Scorcia interrupts: 22*012dfa0cSLuca Leonardo Scorcia items: 23*012dfa0cSLuca Leonardo Scorcia - description: BT-SCO interrupt 24*012dfa0cSLuca Leonardo Scorcia 25*012dfa0cSLuca Leonardo Scorcia mediatek,infracfg: 26*012dfa0cSLuca Leonardo Scorcia $ref: /schemas/types.yaml#/definitions/phandle 27*012dfa0cSLuca Leonardo Scorcia description: The phandle of the infracfg controller 28*012dfa0cSLuca Leonardo Scorcia 29*012dfa0cSLuca Leonardo Scorcia mediatek,offset: 30*012dfa0cSLuca Leonardo Scorcia $ref: /schemas/types.yaml#/definitions/uint32-array 31*012dfa0cSLuca Leonardo Scorcia description: Array of register offsets and masks 32*012dfa0cSLuca Leonardo Scorcia items: 33*012dfa0cSLuca Leonardo Scorcia - description: infra_misc_offset 34*012dfa0cSLuca Leonardo Scorcia - description: infra_conn_bt_cvsd_mask 35*012dfa0cSLuca Leonardo Scorcia - description: cvsd_mcu_read_offset 36*012dfa0cSLuca Leonardo Scorcia - description: cvsd_mcu_write_offset 37*012dfa0cSLuca Leonardo Scorcia - description: cvsd_packet_indicator_offset 38*012dfa0cSLuca Leonardo Scorcia 39*012dfa0cSLuca Leonardo Scorciarequired: 40*012dfa0cSLuca Leonardo Scorcia - compatible 41*012dfa0cSLuca Leonardo Scorcia - reg 42*012dfa0cSLuca Leonardo Scorcia - interrupts 43*012dfa0cSLuca Leonardo Scorcia - mediatek,infracfg 44*012dfa0cSLuca Leonardo Scorcia - mediatek,offset 45*012dfa0cSLuca Leonardo Scorcia 46*012dfa0cSLuca Leonardo ScorciaadditionalProperties: false 47*012dfa0cSLuca Leonardo Scorcia 48*012dfa0cSLuca Leonardo Scorciaexamples: 49*012dfa0cSLuca Leonardo Scorcia - | 50*012dfa0cSLuca Leonardo Scorcia #include <dt-bindings/interrupt-controller/arm-gic.h> 51*012dfa0cSLuca Leonardo Scorcia 52*012dfa0cSLuca Leonardo Scorcia mtk-btcvsd-snd@18000000 { 53*012dfa0cSLuca Leonardo Scorcia compatible = "mediatek,mtk-btcvsd-snd"; 54*012dfa0cSLuca Leonardo Scorcia reg = <0x18000000 0x1000>, 55*012dfa0cSLuca Leonardo Scorcia <0x18080000 0x8000>; 56*012dfa0cSLuca Leonardo Scorcia interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_LOW>; 57*012dfa0cSLuca Leonardo Scorcia mediatek,infracfg = <&infrasys>; 58*012dfa0cSLuca Leonardo Scorcia mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>; 59*012dfa0cSLuca Leonardo Scorcia }; 60