1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/mediatek,mtk-btcvsd-snd.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek ALSA BT SCO CVSD/MSBC 8 9maintainers: 10 - Luca Leonardo Scorcia <l.scorcia@gmail.com> 11 12properties: 13 compatible: 14 const: mediatek,mtk-btcvsd-snd 15 16 reg: 17 items: 18 - description: PKV region 19 - description: SRAM_BANK2 region 20 21 interrupts: 22 items: 23 - description: BT-SCO interrupt 24 25 mediatek,infracfg: 26 $ref: /schemas/types.yaml#/definitions/phandle 27 description: The phandle of the infracfg controller 28 29 mediatek,offset: 30 $ref: /schemas/types.yaml#/definitions/uint32-array 31 description: Array of register offsets and masks 32 items: 33 - description: infra_misc_offset 34 - description: infra_conn_bt_cvsd_mask 35 - description: cvsd_mcu_read_offset 36 - description: cvsd_mcu_write_offset 37 - description: cvsd_packet_indicator_offset 38 39required: 40 - compatible 41 - reg 42 - interrupts 43 - mediatek,infracfg 44 - mediatek,offset 45 46additionalProperties: false 47 48examples: 49 - | 50 #include <dt-bindings/interrupt-controller/arm-gic.h> 51 52 mtk-btcvsd-snd@18000000 { 53 compatible = "mediatek,mtk-btcvsd-snd"; 54 reg = <0x18000000 0x1000>, 55 <0x18080000 0x8000>; 56 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_LOW>; 57 mediatek,infracfg = <&infrasys>; 58 mediatek,offset = <0xf00 0x800 0xfd0 0xfd4 0xfd8>; 59 }; 60