xref: /linux/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright (C) 2022, Intel Corporation
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Intel HPS Copy Engine
9
10maintainers:
11  - Matthew Gerlach <matthew.gerlach@linux.intel.com>
12
13description: |
14  The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy
15  a bootable image from host memory to HPS DDR.  Additionally, there is a
16  register the HPS can use to indicate the state of booting the copied image as
17  well as a keep-a-live indication to the host.
18
19properties:
20  compatible:
21    const: intel,hps-copy-engine
22
23  '#dma-cells':
24    const: 1
25
26  reg:
27    maxItems: 1
28
29required:
30  - compatible
31  - reg
32
33additionalProperties: false
34
35examples:
36  - |
37    bus@80000000 {
38        compatible = "simple-bus";
39        reg = <0x80000000 0x60000000>,
40              <0xf9000000 0x00100000>;
41        reg-names = "axi_h2f", "axi_h2f_lw";
42        #address-cells = <2>;
43        #size-cells = <1>;
44        ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
45
46        dma-controller@0 {
47            compatible = "intel,hps-copy-engine";
48            reg = <0x00000000 0x00000000 0x00001000>;
49            #dma-cells = <1>;
50        };
51    };
52