xref: /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: High-Level Data Link Control(HDLC)
8
9description: HDLC part in Universal communication controllers (UCCs)
10
11maintainers:
12  - Frank Li <Frank.Li@nxp.com>
13
14properties:
15  compatible:
16    const: fsl,ucc-hdlc
17
18  reg:
19    maxItems: 1
20
21  interrupts:
22    maxItems: 1
23
24  cell-index:
25    $ref: /schemas/types.yaml#/definitions/uint32
26
27  rx-clock-name:
28    $ref: /schemas/types.yaml#/definitions/string
29    oneOf:
30      - pattern: "^brg([0-9]|1[0-6])$"
31      - pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
32
33  tx-clock-name:
34    $ref: /schemas/types.yaml#/definitions/string
35    oneOf:
36      - pattern: "^brg([0-9]|1[0-6])$"
37      - pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
38
39  fsl,tdm-interface:
40    $ref: /schemas/types.yaml#/definitions/flag
41    description: Specify that hdlc is based on tdm-interface
42
43  fsl,rx-sync-clock:
44    $ref: /schemas/types.yaml#/definitions/string
45    description: rx-sync
46    enum:
47      - none
48      - rsync_pin
49      - brg9
50      - brg10
51      - brg11
52      - brg13
53      - brg14
54      - brg15
55
56  fsl,tx-sync-clock:
57    $ref: /schemas/types.yaml#/definitions/string
58    description: tx-sync
59    enum:
60      - none
61      - tsync_pin
62      - brg9
63      - brg10
64      - brg11
65      - brg13
66      - brg14
67      - brg15
68
69  fsl,tdm-framer-type:
70    $ref: /schemas/types.yaml#/definitions/string
71    description: required for tdm interface
72    enum: [e1, t1]
73
74  fsl,tdm-id:
75    $ref: /schemas/types.yaml#/definitions/uint32
76    description: number of TDM ID
77
78  fsl,tx-timeslot-mask:
79    $ref: /schemas/types.yaml#/definitions/uint32
80    description:
81      required for tdm interface.
82      time slot mask for TDM operation. Indicates which time
83      slots used for transmitting and receiving.
84
85  fsl,rx-timeslot-mask:
86    $ref: /schemas/types.yaml#/definitions/uint32
87    description:
88      required for tdm interface.
89      time slot mask for TDM operation. Indicates which time
90      slots used for transmitting and receiving.
91
92  fsl,siram-entry-id:
93    $ref: /schemas/types.yaml#/definitions/uint32
94    description:
95      required for tdm interface
96      Must be 0,2,4...64. the number of TDM entry.
97
98  fsl,tdm-internal-loopback:
99    $ref: /schemas/types.yaml#/definitions/flag
100    description:
101      optional for tdm interface
102      Internal loopback connecting on TDM layer.
103
104  fsl,hmask:
105    $ref: /schemas/types.yaml#/definitions/uint16
106    description: |
107      HDLC address recognition. Set to zero to disable
108      address filtering of packets:
109      fsl,hmask = /bits/ 16 <0x0000>;
110
111required:
112  - compatible
113  - reg
114
115additionalProperties: false
116
117examples:
118  - |
119    communication@2000 {
120        compatible = "fsl,ucc-hdlc";
121        reg = <0x2000 0x200>;
122        rx-clock-name = "clk8";
123        tx-clock-name = "clk9";
124        fsl,rx-sync-clock = "rsync_pin";
125        fsl,tx-sync-clock = "tsync_pin";
126        fsl,tx-timeslot-mask = <0xfffffffe>;
127        fsl,rx-timeslot-mask = <0xfffffffe>;
128        fsl,tdm-framer-type = "e1";
129        fsl,tdm-id = <0>;
130        fsl,siram-entry-id = <0>;
131        fsl,tdm-interface;
132    };
133
134  - |
135    communication@2000 {
136        compatible = "fsl,ucc-hdlc";
137        reg = <0x2000 0x200>;
138        rx-clock-name = "brg1";
139        tx-clock-name = "brg1";
140    };
141