xref: /linux/Documentation/devicetree/bindings/serial/qcom,sa8255p-geni-uart.yaml (revision 91e60731dd605c5d6bab8b9ccac886da1780d5ca) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/qcom,sa8255p-geni-uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Geni based QUP UART interface
8
9maintainers:
10  - Praveen Talari <quic_ptalari@quicinc.com>
11
12allOf:
13  - $ref: /schemas/serial/serial.yaml#
14
15properties:
16  compatible:
17    enum:
18      - qcom,sa8255p-geni-uart
19      - qcom,sa8255p-geni-debug-uart
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    minItems: 1
26    items:
27      - description: UART core irq
28      - description: Wakeup irq (RX GPIO)
29
30  interrupt-names:
31    description:
32      The UART interrupt and optionally the RX in-band wakeup interrupt
33      as not all UART instances have a wakeup-capable interrupt routed
34      via the PDC.
35    minItems: 1
36    items:
37      - const: uart
38      - const: wakeup
39
40  power-domains:
41    minItems: 2
42    maxItems: 2
43
44  power-domain-names:
45    items:
46      - const: power
47      - const: perf
48
49required:
50  - compatible
51  - reg
52  - interrupts
53  - power-domains
54  - power-domain-names
55
56unevaluatedProperties: false
57
58examples:
59  - |
60    #include <dt-bindings/interrupt-controller/arm-gic.h>
61
62    serial@990000 {
63        compatible = "qcom,sa8255p-geni-uart";
64        reg = <0x990000 0x4000>;
65        interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
66        power-domains = <&scmi0_pd 0>, <&scmi0_dvfs 0>;
67        power-domain-names = "power", "perf";
68    };
69...
70