1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,shikra-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Shikra SoC Peripheral Authentication Service 8 9maintainers: 10 - Bibek Kumar Patro <bibek.patro@oss.qualcomm.com> 11 - Komal Bajaj <komal.bajaj@oss.qualcomm.com> 12 13description: 14 Qualcomm Shikra SoC Peripheral Authentication Service loads and boots 15 firmware on the Qualcomm DSP Hexagon cores. 16 17properties: 18 compatible: 19 enum: 20 - qcom,shikra-cdsp-pas 21 - qcom,shikra-lpaicp-pas 22 - qcom,shikra-mpss-pas 23 24 reg: 25 maxItems: 1 26 27 clocks: 28 items: 29 - description: XO clock 30 31 clock-names: 32 items: 33 - const: xo 34 35 memory-region: 36 minItems: 1 37 maxItems: 2 38 39 smd-edge: false 40 41 firmware-name: 42 minItems: 1 43 items: 44 - description: Firmware name of the Hexagon core 45 - description: Firmware name of the Hexagon Devicetree 46 47 glink-edge: 48 $ref: /schemas/remoteproc/qcom,glink-edge.yaml# 49 description: 50 Qualcomm G-Link subnode which represents communication edge, channels 51 and devices related to the remoteproc core. 52 unevaluatedProperties: false 53 54 qcom,smem-states: 55 $ref: /schemas/types.yaml#/definitions/phandle-array 56 description: States used by the AP to signal the Hexagon core 57 items: 58 - description: Stop the remote processor 59 items: 60 - description: Phandle to the Shared Memory Point 2 Point device 61 handling the communication with a remote processor 62 - description: Single bit index to toggle in the value sent to 63 the remote processor 64 maximum: 32 65 66 qcom,smem-state-names: 67 description: The names of the state bits used for SMP2P output 68 items: 69 - const: stop 70 71required: 72 - compatible 73 - reg 74 - memory-region 75 76allOf: 77 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 78 79 - if: 80 properties: 81 compatible: 82 enum: 83 - qcom,shikra-cdsp-pas 84 - qcom,shikra-mpss-pas 85 then: 86 properties: 87 interrupts: 88 minItems: 6 89 interrupt-names: 90 minItems: 6 91 memory-region: 92 maxItems: 1 93 firmware-name: 94 maxItems: 1 95 power-domains: 96 items: 97 - description: CX power domain 98 power-domain-names: 99 items: 100 - const: cx 101 102 - if: 103 properties: 104 compatible: 105 enum: 106 - qcom,shikra-lpaicp-pas 107 then: 108 properties: 109 interrupts: 110 maxItems: 5 111 interrupt-names: 112 maxItems: 5 113 memory-region: 114 minItems: 2 115 firmware-name: 116 minItems: 2 117 power-domains: false 118 power-domain-names: false 119 120unevaluatedProperties: false 121 122examples: 123 - | 124 #include <dt-bindings/clock/qcom,rpmcc.h> 125 #include <dt-bindings/interconnect/qcom,icc.h> 126 #include <dt-bindings/interconnect/qcom,rpm-icc.h> 127 #include <dt-bindings/interconnect/qcom,shikra.h> 128 #include <dt-bindings/interrupt-controller/arm-gic.h> 129 #include <dt-bindings/interrupt-controller/irq.h> 130 #include <dt-bindings/power/qcom-rpmpd.h> 131 132 remoteproc@b300000 { 133 compatible = "qcom,shikra-cdsp-pas"; 134 reg = <0x0b300000 0x100000>; 135 136 interrupts-extended = <&intc GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, 137 <&cdsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 138 <&cdsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 139 <&cdsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 140 <&cdsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, 141 <&cdsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING>; 142 interrupt-names = "wdog", "fatal", "ready", 143 "handover", "stop-ack", "shutdown-ack"; 144 145 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>; 146 clock-names = "xo"; 147 148 interconnects = <&mem_noc MASTER_AMPSS_M0 RPM_ALWAYS_TAG 149 &mc_virt SLAVE_EBI_CH0 RPM_ALWAYS_TAG>; 150 151 power-domains = <&rpmpd RPMHPD_CX>; 152 power-domain-names = "cx"; 153 154 memory-region = <&cdsp_mem>; 155 156 qcom,smem-states = <&cdsp_smp2p_out 0>; 157 qcom,smem-state-names = "stop"; 158 159 firmware-name = "qcom/shikra/cdsp.mbn"; 160 161 glink-edge { 162 interrupts = <GIC_SPI 261 IRQ_TYPE_EDGE_RISING>; 163 mboxes = <&apcs_glb 4>; 164 qcom,remote-pid = <5>; 165 label = "cdsp"; 166 }; 167 }; 168