1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,kaanapali-soccp-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Kaanapali SoCCP Peripheral Authentication Service 8 9maintainers: 10 - Jingyi Wang <jingyi.wang@oss.qualcomm.com> 11 12description: 13 The SoC Control Processor (SoCCP) is a small RISC-V MCU that controls USB 14 Type-C, battery charging and various other functions on Qualcomm SoCs, somewhat 15 analogous to traditional PC Embedded Controllers. This document describes 16 the Peripheral Authentication Service that loads and boots firmware for SoCCP. 17 18properties: 19 compatible: 20 oneOf: 21 - items: 22 - enum: 23 - qcom,hawi-soccp-pas 24 - qcom,maili-soccp-pas 25 - const: qcom,kaanapali-soccp-pas 26 - enum: 27 - qcom,glymur-soccp-pas 28 - qcom,kaanapali-soccp-pas 29 30 reg: 31 maxItems: 1 32 33 clocks: 34 items: 35 - description: XO clock 36 37 clock-names: 38 items: 39 - const: xo 40 41 power-domains: 42 items: 43 - description: CX power domain 44 - description: MX power domain 45 46 power-domain-names: 47 items: 48 - const: cx 49 - const: mx 50 51 firmware-name: 52 items: 53 - description: Firmware name of the SoC Control Processor 54 - description: Firmware name of the SoCCP Devicetree 55 56 memory-region: 57 items: 58 - description: Memory region for main Firmware authentication 59 - description: Memory region for Devicetree Firmware authentication 60 61 interrupts: 62 items: 63 - description: Watchdog interrupt 64 - description: Fatal interrupt 65 - description: Ready interrupt 66 - description: Handover interrupt 67 - description: Stop acknowledge interrupt 68 - description: Pong interrupt 69 70 interrupt-names: 71 items: 72 - const: wdog 73 - const: fatal 74 - const: ready 75 - const: handover 76 - const: stop-ack 77 - const: pong 78 79 qcom,smem-states: 80 minItems: 2 81 description: States used by the AP to signal the SoC Control Processor 82 83 qcom,smem-state-names: 84 minItems: 2 85 description: The names of the state bits used for SMP2P output 86 87required: 88 - compatible 89 - reg 90 - memory-region 91 - power-domains 92 - power-domain-names 93 94allOf: 95 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 96 97unevaluatedProperties: false 98 99examples: 100 - | 101 #include <dt-bindings/clock/qcom,rpmh.h> 102 #include <dt-bindings/interrupt-controller/arm-gic.h> 103 #include <dt-bindings/interrupt-controller/irq.h> 104 #include <dt-bindings/mailbox/qcom-ipcc.h> 105 #include <dt-bindings/power/qcom-rpmpd.h> 106 #define IPCC_MPROC_SOCCP 107 108 remoteproc@d00000 { 109 compatible = "qcom,kaanapali-soccp-pas"; 110 reg = <0x00d00000 0x200000>; 111 112 clocks = <&rpmhcc RPMH_CXO_CLK>; 113 clock-names = "xo"; 114 115 interrupts-extended = <&intc GIC_SPI 167 IRQ_TYPE_EDGE_RISING>, 116 <&soccp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 117 <&soccp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, 118 <&soccp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, 119 <&soccp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>, 120 <&soccp_smp2p_in 9 IRQ_TYPE_EDGE_RISING>; 121 interrupt-names = "wdog", 122 "fatal", 123 "ready", 124 "handover", 125 "stop-ack", 126 "pong"; 127 128 memory-region = <&soccp_mem>, 129 <&soccp_dtb_mem_mem>; 130 131 firmware-name = "qcom/kaanapali/soccp.mbn", 132 "qcom/kaanapali/soccp_dtb.mbn"; 133 134 power-domains = <&rpmhpd RPMHPD_CX>, 135 <&rpmhpd RPMHPD_MX>; 136 power-domain-names = "cx", 137 "mx"; 138 139 qcom,smem-states = <&soccp_smp2p_out 0>, 140 <&soccp_smp2p_out 8>; 141 qcom,smem-state-names = "stop", 142 "ping"; 143 144 glink-edge { 145 interrupts-extended = <&ipcc IPCC_MPROC_SOCCP 146 IPCC_MPROC_SIGNAL_GLINK_QMP 147 IRQ_TYPE_EDGE_RISING>; 148 mboxes = <&ipcc IPCC_MPROC_SOCCP 149 IPCC_MPROC_SIGNAL_GLINK_QMP>; 150 151 label = "soccp"; 152 qcom,remote-pid = <19>; 153 154 /* ... */ 155 }; 156 }; 157