xref: /linux/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml (revision 53c7db5c1916afcecc8683ae01ff8415c708a883) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: UltraRISC DP1000 Pin Controller
8
9maintainers:
10  - Jia Wang <wangjia@ultrarisc.com>
11
12description: |
13  UltraRISC RISC-V SoC DP1000 pin controller.
14  The controller manages ports A, B, C, D and LPC. Ports A-D default to
15  GPIO and provide additional SPI, UART, I2C, and PWM mux functions.
16  LPC pins default to the LPC interface and can be muxed to eSPI.
17  All pins also support pin configuration, including drive strength,
18  pull-up, and pull-down settings.
19
20properties:
21  compatible:
22    const: ultrarisc,dp1000-pinctrl
23
24  reg:
25    items:
26      - description: pin controller registers
27
28required:
29  - compatible
30  - reg
31
32patternProperties:
33  '.*-pins$':
34    type: object
35    unevaluatedProperties: false
36    allOf:
37      - $ref: /schemas/pinctrl/pincfg-node.yaml#
38      - $ref: /schemas/pinctrl/pinmux-node.yaml#
39      - if:
40          properties:
41            pins:
42              items:
43                minimum: 40
44                maximum: 52
45        then:
46          properties:
47            function:
48              enum:
49                - lpc
50                - espi
51        else:
52          properties:
53            pins:
54              items:
55                maximum: 39
56            function:
57              enum:
58                - gpio
59                - i2c
60                - pwm
61                - spi
62                - uart
63
64    properties:
65      pins:
66        description: |
67          List of pins affected by this state node, using numeric pin IDs.
68          Pins 0-39 correspond to ports A-D, and pins 40-52 correspond
69          to LPC0-LPC12.
70        $ref: /schemas/types.yaml#/definitions/uint32-array
71        minItems: 1
72        uniqueItems: true
73        items:
74          minimum: 0
75          maximum: 52
76
77      function:
78        description: |
79          Mux function to select for the listed pins. Supported functions
80          depend on the selected pins and match the DP1000 hardware mux
81          table.
82        enum:
83          - gpio
84          - i2c
85          - pwm
86          - spi
87          - uart
88          - lpc
89          - espi
90
91      bias-disable: true
92      bias-high-impedance: true
93      bias-pull-up: true
94      bias-pull-down: true
95
96      drive-strength:
97        description: Output drive strength in mA.
98        enum: [20, 27, 33, 40]
99
100    required:
101      - pins
102      - function
103
104unevaluatedProperties: false
105
106examples:
107  - |
108    soc {
109      #address-cells = <2>;
110      #size-cells = <2>;
111
112      pinctrl@11081000 {
113        compatible = "ultrarisc,dp1000-pinctrl";
114        reg = <0x0 0x11081000 0x0 0x1000>;
115
116        i2c0-pins {
117          pins = <12 13>;
118          function = "i2c";
119          bias-pull-up;
120          drive-strength = <33>;
121        };
122
123        uart0-pins {
124          pins = <8 9>;
125          function = "uart";
126          bias-pull-up;
127          drive-strength = <33>;
128        };
129      };
130    };
131