xref: /linux/Documentation/devicetree/bindings/pinctrl/qcom,milos-lpass-lpi-pinctrl.yaml (revision 0fc8f6200d2313278fbf4539bbab74677c685531) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,milos-lpass-lpi-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Milos SoC LPASS LPI TLMM
8
9maintainers:
10  - Luca Weiss <luca.weiss@fairphone.com>
11
12description:
13  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem
14  (LPASS) Low Power Island (LPI) of Qualcomm Milos SoC.
15
16properties:
17  compatible:
18    const: qcom,milos-lpass-lpi-pinctrl
19
20  reg:
21    items:
22      - description: LPASS LPI TLMM Control and Status registers
23      - description: LPASS LPI MCC registers
24
25  clocks:
26    items:
27      - description: LPASS Core voting clock
28      - description: LPASS Audio voting clock
29
30  clock-names:
31    items:
32      - const: core
33      - const: audio
34
35patternProperties:
36  "-state$":
37    oneOf:
38      - $ref: "#/$defs/qcom-milos-lpass-state"
39      - patternProperties:
40          "-pins$":
41            $ref: "#/$defs/qcom-milos-lpass-state"
42        additionalProperties: false
43
44$defs:
45  qcom-milos-lpass-state:
46    type: object
47    description:
48      Pinctrl node's client devices use subnodes for desired pin configuration.
49      Client device subnodes use below standard properties.
50    $ref: qcom,lpass-lpi-common.yaml#/$defs/qcom-tlmm-state
51    unevaluatedProperties: false
52
53    properties:
54      pins:
55        description:
56          List of gpio pins affected by the properties specified in this
57          subnode.
58        items:
59          pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"
60
61      function:
62        enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,
63                dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,
64                ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,
65                i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,
66                i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, qca_swr_clk,
67                qca_swr_data, slimbus_clk, slimbus_data, swr_rx_clk,
68                swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,
69                wsa_swr_data ]
70        description:
71          Specify the alternative function to be configured for the specified
72          pins.
73
74allOf:
75  - $ref: qcom,lpass-lpi-common.yaml#
76
77required:
78  - compatible
79  - reg
80  - clocks
81  - clock-names
82
83unevaluatedProperties: false
84
85examples:
86  - |
87    #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
88
89    pinctrl@3440000 {
90        compatible = "qcom,milos-lpass-lpi-pinctrl";
91        reg = <0x03440000 0x20000>,
92              <0x034d0000 0x10000>;
93        gpio-controller;
94        #gpio-cells = <2>;
95        gpio-ranges = <&lpass_tlmm 0 0 23>;
96
97        clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
98                 <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
99        clock-names = "core",
100                      "audio";
101
102        tx-swr-active-clk-state {
103            pins = "gpio0";
104            function = "swr_tx_clk";
105            drive-strength = <4>;
106            slew-rate = <1>;
107            bias-disable;
108        };
109    };
110