1*ba6bf288SNikolai Burov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*ba6bf288SNikolai Burov%YAML 1.2 3*ba6bf288SNikolai Burov--- 4*ba6bf288SNikolai Burov$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6858-pinctrl.yaml# 5*ba6bf288SNikolai Burov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ba6bf288SNikolai Burov 7*ba6bf288SNikolai Burovtitle: MediaTek MT6858 Pin Controller 8*ba6bf288SNikolai Burov 9*ba6bf288SNikolai Burovmaintainers: 10*ba6bf288SNikolai Burov - Nikolai Burov <nikolai.burov@jolla.com> 11*ba6bf288SNikolai Burov 12*ba6bf288SNikolai Burovdescription: 13*ba6bf288SNikolai Burov The MediaTek's MT6858 Pin controller is used to control SoC pins. 14*ba6bf288SNikolai Burov 15*ba6bf288SNikolai Burovproperties: 16*ba6bf288SNikolai Burov compatible: 17*ba6bf288SNikolai Burov const: mediatek,mt6858-pinctrl 18*ba6bf288SNikolai Burov 19*ba6bf288SNikolai Burov reg: 20*ba6bf288SNikolai Burov items: 21*ba6bf288SNikolai Burov - description: gpio base 22*ba6bf288SNikolai Burov - description: lm group IO 23*ba6bf288SNikolai Burov - description: rb group IO 24*ba6bf288SNikolai Burov - description: bm2 group IO 25*ba6bf288SNikolai Burov - description: bm group IO 26*ba6bf288SNikolai Burov - description: bm1 group IO 27*ba6bf288SNikolai Burov - description: lt group IO 28*ba6bf288SNikolai Burov - description: lt1 group IO 29*ba6bf288SNikolai Burov - description: rt group IO 30*ba6bf288SNikolai Burov - description: rt1 group IO 31*ba6bf288SNikolai Burov - description: eint south group IO 32*ba6bf288SNikolai Burov - description: eint west group IO 33*ba6bf288SNikolai Burov - description: eint east group IO 34*ba6bf288SNikolai Burov - description: eint center group IO 35*ba6bf288SNikolai Burov 36*ba6bf288SNikolai Burov reg-names: 37*ba6bf288SNikolai Burov items: 38*ba6bf288SNikolai Burov - const: base 39*ba6bf288SNikolai Burov - const: lm 40*ba6bf288SNikolai Burov - const: rb 41*ba6bf288SNikolai Burov - const: bm2 42*ba6bf288SNikolai Burov - const: bm 43*ba6bf288SNikolai Burov - const: bm1 44*ba6bf288SNikolai Burov - const: lt 45*ba6bf288SNikolai Burov - const: lt1 46*ba6bf288SNikolai Burov - const: rt 47*ba6bf288SNikolai Burov - const: rt1 48*ba6bf288SNikolai Burov - const: eint0 49*ba6bf288SNikolai Burov - const: eint1 50*ba6bf288SNikolai Burov - const: eint2 51*ba6bf288SNikolai Burov - const: eint3 52*ba6bf288SNikolai Burov 53*ba6bf288SNikolai Burov interrupts: 54*ba6bf288SNikolai Burov maxItems: 1 55*ba6bf288SNikolai Burov 56*ba6bf288SNikolai Burov interrupt-controller: true 57*ba6bf288SNikolai Burov 58*ba6bf288SNikolai Burov '#interrupt-cells': 59*ba6bf288SNikolai Burov const: 2 60*ba6bf288SNikolai Burov 61*ba6bf288SNikolai Burov gpio-controller: true 62*ba6bf288SNikolai Burov 63*ba6bf288SNikolai Burov '#gpio-cells': 64*ba6bf288SNikolai Burov const: 2 65*ba6bf288SNikolai Burov 66*ba6bf288SNikolai Burov gpio-ranges: 67*ba6bf288SNikolai Burov maxItems: 1 68*ba6bf288SNikolai Burov 69*ba6bf288SNikolai Burov gpio-line-names: true 70*ba6bf288SNikolai Burov 71*ba6bf288SNikolai Burov# PIN CONFIGURATION NODES 72*ba6bf288SNikolai BurovpatternProperties: 73*ba6bf288SNikolai Burov '-pins$': 74*ba6bf288SNikolai Burov type: object 75*ba6bf288SNikolai Burov additionalProperties: false 76*ba6bf288SNikolai Burov 77*ba6bf288SNikolai Burov patternProperties: 78*ba6bf288SNikolai Burov '^pins': 79*ba6bf288SNikolai Burov type: object 80*ba6bf288SNikolai Burov $ref: /schemas/pinctrl/pincfg-node.yaml 81*ba6bf288SNikolai Burov additionalProperties: false 82*ba6bf288SNikolai Burov description: 83*ba6bf288SNikolai Burov A pinctrl node should contain at least one subnodes representing the 84*ba6bf288SNikolai Burov pinctrl groups available on the machine. Each subnode will list the 85*ba6bf288SNikolai Burov pins it needs, and how they should be configured, with regard to muxer 86*ba6bf288SNikolai Burov configuration, pullups, drive strength, input enable/disable and input 87*ba6bf288SNikolai Burov schmitt. 88*ba6bf288SNikolai Burov 89*ba6bf288SNikolai Burov properties: 90*ba6bf288SNikolai Burov pinmux: 91*ba6bf288SNikolai Burov description: 92*ba6bf288SNikolai Burov Integer array, represents gpio pin number and mux setting. 93*ba6bf288SNikolai Burov Supported pin number and mux varies for different SoCs, and are 94*ba6bf288SNikolai Burov defined as macros in arch/arm64/boot/dts/mediatek/mt6858-pinfunc.h 95*ba6bf288SNikolai Burov for this SoC. 96*ba6bf288SNikolai Burov 97*ba6bf288SNikolai Burov drive-strength: 98*ba6bf288SNikolai Burov enum: [2, 4, 6, 8, 10, 12, 14, 16] 99*ba6bf288SNikolai Burov 100*ba6bf288SNikolai Burov bias-pull-down: 101*ba6bf288SNikolai Burov oneOf: 102*ba6bf288SNikolai Burov - type: boolean 103*ba6bf288SNikolai Burov description: normal pull down. 104*ba6bf288SNikolai Burov - enum: [100, 101, 102, 103] 105*ba6bf288SNikolai Burov description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_ 106*ba6bf288SNikolai Burov defines in dt-bindings/pinctrl/mt65xx.h. 107*ba6bf288SNikolai Burov - enum: [200, 201, 202, 203] 108*ba6bf288SNikolai Burov description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines 109*ba6bf288SNikolai Burov in dt-bindings/pinctrl/mt65xx.h. 110*ba6bf288SNikolai Burov 111*ba6bf288SNikolai Burov bias-pull-up: 112*ba6bf288SNikolai Burov oneOf: 113*ba6bf288SNikolai Burov - type: boolean 114*ba6bf288SNikolai Burov description: normal pull up. 115*ba6bf288SNikolai Burov - enum: [100, 101, 102, 103] 116*ba6bf288SNikolai Burov description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_ 117*ba6bf288SNikolai Burov defines in dt-bindings/pinctrl/mt65xx.h. 118*ba6bf288SNikolai Burov - enum: [200, 201, 202, 203] 119*ba6bf288SNikolai Burov description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines 120*ba6bf288SNikolai Burov in dt-bindings/pinctrl/mt65xx.h. 121*ba6bf288SNikolai Burov 122*ba6bf288SNikolai Burov bias-disable: true 123*ba6bf288SNikolai Burov 124*ba6bf288SNikolai Burov output-high: true 125*ba6bf288SNikolai Burov 126*ba6bf288SNikolai Burov output-low: true 127*ba6bf288SNikolai Burov 128*ba6bf288SNikolai Burov input-enable: true 129*ba6bf288SNikolai Burov 130*ba6bf288SNikolai Burov input-disable: true 131*ba6bf288SNikolai Burov 132*ba6bf288SNikolai Burov input-schmitt-enable: true 133*ba6bf288SNikolai Burov 134*ba6bf288SNikolai Burov input-schmitt-disable: true 135*ba6bf288SNikolai Burov 136*ba6bf288SNikolai Burov required: 137*ba6bf288SNikolai Burov - pinmux 138*ba6bf288SNikolai Burov 139*ba6bf288SNikolai Burovrequired: 140*ba6bf288SNikolai Burov - compatible 141*ba6bf288SNikolai Burov - reg 142*ba6bf288SNikolai Burov - interrupts 143*ba6bf288SNikolai Burov - interrupt-controller 144*ba6bf288SNikolai Burov - '#interrupt-cells' 145*ba6bf288SNikolai Burov - gpio-controller 146*ba6bf288SNikolai Burov - '#gpio-cells' 147*ba6bf288SNikolai Burov - gpio-ranges 148*ba6bf288SNikolai Burov 149*ba6bf288SNikolai BurovadditionalProperties: false 150*ba6bf288SNikolai Burov 151*ba6bf288SNikolai Burovexamples: 152*ba6bf288SNikolai Burov - | 153*ba6bf288SNikolai Burov #include <dt-bindings/pinctrl/mt65xx.h> 154*ba6bf288SNikolai Burov #include <dt-bindings/interrupt-controller/arm-gic.h> 155*ba6bf288SNikolai Burov #define PINMUX_GPIO149__FUNC_SCL5 (MTK_PIN_NO(149) | 1) 156*ba6bf288SNikolai Burov #define PINMUX_GPIO150__FUNC_SDA5 (MTK_PIN_NO(150) | 1) 157*ba6bf288SNikolai Burov 158*ba6bf288SNikolai Burov pio: pinctrl@10005000 { 159*ba6bf288SNikolai Burov compatible = "mediatek,mt6858-pinctrl"; 160*ba6bf288SNikolai Burov reg = <0x10005000 0x1000>, 161*ba6bf288SNikolai Burov <0x11b20000 0x1000>, 162*ba6bf288SNikolai Burov <0x11c10000 0x1000>, 163*ba6bf288SNikolai Burov <0x11d10000 0x1000>, 164*ba6bf288SNikolai Burov <0x11d30000 0x1000>, 165*ba6bf288SNikolai Burov <0x11d40000 0x1000>, 166*ba6bf288SNikolai Burov <0x11e20000 0x1000>, 167*ba6bf288SNikolai Burov <0x11e30000 0x1000>, 168*ba6bf288SNikolai Burov <0x11ed0000 0x1000>, 169*ba6bf288SNikolai Burov <0x11ee0000 0x1000>, 170*ba6bf288SNikolai Burov <0x11b00000 0x1000>, 171*ba6bf288SNikolai Burov <0x11e60000 0x1000>, 172*ba6bf288SNikolai Burov <0x11e80000 0x1000>, 173*ba6bf288SNikolai Burov <0x1c01e000 0x1000>; 174*ba6bf288SNikolai Burov reg-names = "base", "lm", "rb", "bm2", "bm", "bm1", "lt", "lt1", 175*ba6bf288SNikolai Burov "rt", "rt1", "eint0", "eint1", "eint2", "eint3"; 176*ba6bf288SNikolai Burov gpio-controller; 177*ba6bf288SNikolai Burov #gpio-cells = <2>; 178*ba6bf288SNikolai Burov gpio-ranges = <&pio 0 0 197>; 179*ba6bf288SNikolai Burov interrupt-controller; 180*ba6bf288SNikolai Burov interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>; 181*ba6bf288SNikolai Burov #interrupt-cells = <2>; 182*ba6bf288SNikolai Burov 183*ba6bf288SNikolai Burov i2c5-pins { 184*ba6bf288SNikolai Burov pins { 185*ba6bf288SNikolai Burov pinmux = <PINMUX_GPIO149__FUNC_SCL5>, 186*ba6bf288SNikolai Burov <PINMUX_GPIO150__FUNC_SDA5>; 187*ba6bf288SNikolai Burov bias-disable; 188*ba6bf288SNikolai Burov }; 189*ba6bf288SNikolai Burov }; 190*ba6bf288SNikolai Burov }; 191