xref: /linux/Documentation/devicetree/bindings/pinctrl/mediatek,mt6858-pinctrl.yaml (revision cf9610f9116d55c5a66ef9f1faecacabd93a9322) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6858-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek MT6858 Pin Controller
8
9maintainers:
10  - Nikolai Burov <nikolai.burov@jolla.com>
11
12description:
13  The MediaTek's MT6858 Pin controller is used to control SoC pins.
14
15properties:
16  compatible:
17    const: mediatek,mt6858-pinctrl
18
19  reg:
20    items:
21      - description: gpio base
22      - description: lm group IO
23      - description: rb group IO
24      - description: bm2 group IO
25      - description: bm group IO
26      - description: bm1 group IO
27      - description: lt group IO
28      - description: lt1 group IO
29      - description: rt group IO
30      - description: rt1 group IO
31      - description: eint south group IO
32      - description: eint west group IO
33      - description: eint east group IO
34      - description: eint center group IO
35
36  reg-names:
37    items:
38      - const: base
39      - const: lm
40      - const: rb
41      - const: bm2
42      - const: bm
43      - const: bm1
44      - const: lt
45      - const: lt1
46      - const: rt
47      - const: rt1
48      - const: eint0
49      - const: eint1
50      - const: eint2
51      - const: eint3
52
53  interrupts:
54    maxItems: 1
55
56  interrupt-controller: true
57
58  '#interrupt-cells':
59    const: 2
60
61  gpio-controller: true
62
63  '#gpio-cells':
64    const: 2
65
66  gpio-ranges:
67    maxItems: 1
68
69  gpio-line-names: true
70
71# PIN CONFIGURATION NODES
72patternProperties:
73  '-pins$':
74    type: object
75    additionalProperties: false
76
77    patternProperties:
78      '^pins':
79        type: object
80        $ref: /schemas/pinctrl/pincfg-node.yaml
81        additionalProperties: false
82        description:
83          A pinctrl node should contain at least one subnodes representing the
84          pinctrl groups available on the machine. Each subnode will list the
85          pins it needs, and how they should be configured, with regard to muxer
86          configuration, pullups, drive strength, input enable/disable and input
87          schmitt.
88
89        properties:
90          pinmux:
91            description:
92              Integer array, represents gpio pin number and mux setting.
93              Supported pin number and mux varies for different SoCs, and are
94              defined as macros in arch/arm64/boot/dts/mediatek/mt6858-pinfunc.h
95              for this SoC.
96
97          drive-strength:
98            enum: [2, 4, 6, 8, 10, 12, 14, 16]
99
100          bias-pull-down:
101            oneOf:
102              - type: boolean
103                description: normal pull down.
104              - enum: [100, 101, 102, 103]
105                description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
106                  defines in dt-bindings/pinctrl/mt65xx.h.
107              - enum: [200, 201, 202, 203]
108                description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
109                  in dt-bindings/pinctrl/mt65xx.h.
110
111          bias-pull-up:
112            oneOf:
113              - type: boolean
114                description: normal pull up.
115              - enum: [100, 101, 102, 103]
116                description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
117                  defines in dt-bindings/pinctrl/mt65xx.h.
118              - enum: [200, 201, 202, 203]
119                description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
120                  in dt-bindings/pinctrl/mt65xx.h.
121
122          bias-disable: true
123
124          output-high: true
125
126          output-low: true
127
128          input-enable: true
129
130          input-disable: true
131
132          input-schmitt-enable: true
133
134          input-schmitt-disable: true
135
136        required:
137          - pinmux
138
139required:
140  - compatible
141  - reg
142  - interrupts
143  - interrupt-controller
144  - '#interrupt-cells'
145  - gpio-controller
146  - '#gpio-cells'
147  - gpio-ranges
148
149additionalProperties: false
150
151examples:
152  - |
153    #include <dt-bindings/pinctrl/mt65xx.h>
154    #include <dt-bindings/interrupt-controller/arm-gic.h>
155    #define PINMUX_GPIO149__FUNC_SCL5 (MTK_PIN_NO(149) | 1)
156    #define PINMUX_GPIO150__FUNC_SDA5 (MTK_PIN_NO(150) | 1)
157
158    pio: pinctrl@10005000 {
159        compatible = "mediatek,mt6858-pinctrl";
160        reg = <0x10005000 0x1000>,
161              <0x11b20000 0x1000>,
162              <0x11c10000 0x1000>,
163              <0x11d10000 0x1000>,
164              <0x11d30000 0x1000>,
165              <0x11d40000 0x1000>,
166              <0x11e20000 0x1000>,
167              <0x11e30000 0x1000>,
168              <0x11ed0000 0x1000>,
169              <0x11ee0000 0x1000>,
170              <0x11b00000 0x1000>,
171              <0x11e60000 0x1000>,
172              <0x11e80000 0x1000>,
173              <0x1c01e000 0x1000>;
174        reg-names = "base", "lm", "rb", "bm2", "bm", "bm1", "lt", "lt1",
175                    "rt", "rt1", "eint0", "eint1", "eint2", "eint3";
176        gpio-controller;
177        #gpio-cells = <2>;
178        gpio-ranges = <&pio 0 0 197>;
179        interrupt-controller;
180        interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;
181        #interrupt-cells = <2>;
182
183        i2c5-pins {
184            pins {
185                pinmux = <PINMUX_GPIO149__FUNC_SCL5>,
186                         <PINMUX_GPIO150__FUNC_SDA5>;
187                bias-disable;
188            };
189        };
190    };
191