xref: /linux/Documentation/devicetree/bindings/pinctrl/maxim,max77620-pinctrl.yaml (revision faeab166167f5787719eb8683661fd41a3bb1514) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/maxim,max77620-pinctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Pinmux controller function for Maxim MAX77620 Power management IC
8
9maintainers:
10  - Svyatoslav Ryhel <clamor95@gmail.com>
11
12description:
13  Device has 8 GPIO pins which can be configured as GPIO as well as the
14  special IO functions.
15
16allOf:
17  - $ref: /schemas/pinctrl/pincfg-node.yaml
18  - $ref: /schemas/pinctrl/pinmux-node.yaml
19
20patternProperties:
21  "^(pin|gpio).":
22    type: object
23    additionalProperties: false
24
25    properties:
26      pins:
27        items:
28          enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7 ]
29
30      function:
31        items:
32          enum: [ gpio, lpm-control-in, fps-out, 32k-out1, sd0-dvs-in, sd1-dvs-in,
33                  reference-out ]
34
35      drive-push-pull: true
36      drive-open-drain: true
37      bias-pull-up: true
38      bias-pull-down: true
39
40      maxim,active-fps-source:
41        $ref: /schemas/types.yaml#/definitions/uint32
42        description: |
43          FPS source for the GPIOs to get enabled/disabled when system is in
44          active state. Valid values are:
45          - MAX77620_FPS_SRC_0: FPS source is FPS0.
46          - MAX77620_FPS_SRC_1: FPS source is FPS1
47          - MAX77620_FPS_SRC_2: FPS source is FPS2
48          - MAX77620_FPS_SRC_NONE: GPIO is not controlled by FPS events and
49                                   it gets enabled/disabled by register access.
50          Absence of this property will leave the FPS configuration register
51          for that GPIO to default configuration.
52
53      maxim,active-fps-power-up-slot:
54        $ref: /schemas/types.yaml#/definitions/uint32
55        description:
56          Sequencing event slot number on which the GPIO get enabled when
57          master FPS input event set to HIGH. This is applicable if FPS source
58          is selected as FPS0, FPS1 or FPS2.
59        enum: [0, 1, 2, 3, 4, 5, 6, 7]
60
61      maxim,active-fps-power-down-slot:
62        $ref: /schemas/types.yaml#/definitions/uint32
63        description:
64          Sequencing event slot number on which the GPIO get disabled when
65          master FPS input event set to LOW. This is applicable if FPS source
66          is selected as FPS0, FPS1 or FPS2.
67        enum: [0, 1, 2, 3, 4, 5, 6, 7]
68
69      maxim,suspend-fps-source:
70        $ref: /schemas/types.yaml#/definitions/uint32
71        description:
72          This is same as property "maxim,active-fps-source" but value get
73          configured when system enters in to suspend state.
74
75      maxim,suspend-fps-power-up-slot:
76        $ref: /schemas/types.yaml#/definitions/uint32
77        description:
78          This is same as property "maxim,active-fps-power-up-slot" but this
79          value get configured into FPS configuration register when system
80          enters into suspend. This is applicable if suspend state FPS source
81          is selected as FPS0, FPS1 or FPS2.
82        enum: [0, 1, 2, 3, 4, 5, 6, 7]
83
84      maxim,suspend-fps-power-down-slot:
85        $ref: /schemas/types.yaml#/definitions/uint32
86        description:
87          This is same as property "maxim,active-fps-power-down-slot" but this
88          value get configured into FPS configuration register when system
89          enters into suspend. This is applicable if suspend state FPS source
90          is selected as FPS0, FPS1 or FPS2.
91        enum: [0, 1, 2, 3, 4, 5, 6, 7]
92
93    required:
94      - pins
95
96additionalProperties: false
97
98# see maxim,max77620.yaml for an example
99