1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/phy/lantiq,ase-usb2-phy.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Lantiq XWAY SoC RCU USB 1.1/2.0 PHY 8 9maintainers: 10 - Hauke Mehrtens <hauke@hauke-m.de> 11 12description: 13 This node has to be a sub node of the Lantiq RCU block. 14 15properties: 16 compatible: 17 items: 18 - enum: 19 - lantiq,ase-usb2-phy 20 - lantiq,danube-usb2-phy 21 - lantiq,xrx100-usb2-phy 22 - lantiq,xrx200-usb2-phy 23 - lantiq,xrx300-usb2-phy 24 25 reg: 26 items: 27 - description: Offset of the USB PHY configuration register 28 - description: Offset of the USB Analog configuration register 29 30 clocks: 31 maxItems: 1 32 33 clock-names: 34 items: 35 - const: phy 36 37 resets: 38 minItems: 1 39 maxItems: 2 40 41 reset-names: 42 minItems: 1 43 items: 44 - enum: [ phy, ctrl ] 45 - const: ctrl 46 47 '#phy-cells': 48 const: 0 49 50required: 51 - compatible 52 - reg 53 - clocks 54 - clock-names 55 - resets 56 - reset-names 57 - '#phy-cells' 58 59additionalProperties: false 60 61examples: 62 - | 63 usb2-phy@18 { 64 compatible = "lantiq,xrx200-usb2-phy"; 65 reg = <0x18 4>, <0x38 4>; 66 clocks = <&pmu 1>; 67 clock-names = "phy"; 68 resets = <&reset1 4 4>, <&reset0 4 4>; 69 reset-names = "phy", "ctrl"; 70 #phy-cells = <0>; 71 }; 72