1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pci/qcom,pcie-apq8064.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm APQ8064/IPQ8064 PCI Express Root Complex 8 9maintainers: 10 - Bjorn Andersson <andersson@kernel.org> 11 - Manivannan Sadhasivam <mani@kernel.org> 12 13properties: 14 compatible: 15 enum: 16 - qcom,pcie-apq8064 17 - qcom,pcie-ipq8064 18 - qcom,pcie-ipq8064-v2 19 20 reg: 21 maxItems: 4 22 23 reg-names: 24 items: 25 - const: dbi 26 - const: elbi 27 - const: parf 28 - const: config 29 30 clocks: 31 minItems: 3 32 maxItems: 5 33 34 clock-names: 35 minItems: 3 36 items: 37 - const: core # Clocks the pcie hw block 38 - const: iface # Configuration AHB clock 39 - const: phy 40 - const: aux 41 - const: ref 42 43 interrupts: 44 maxItems: 1 45 46 interrupt-names: 47 items: 48 - const: msi 49 50 resets: 51 minItems: 5 52 maxItems: 6 53 54 reset-names: 55 minItems: 5 56 items: 57 - const: axi 58 - const: ahb 59 - const: por 60 - const: pci 61 - const: phy 62 - const: ext 63 64 vdda-supply: 65 description: A phandle to the core analog power supply 66 67 vdda_phy-supply: 68 description: A phandle to the core analog power supply for PHY 69 70 vdda_refclk-supply: 71 description: A phandle to the core analog power supply for IC which generates reference clock 72 73required: 74 - resets 75 - reset-names 76 - vdda-supply 77 - vdda_phy-supply 78 - vdda_refclk-supply 79 80allOf: 81 - $ref: qcom,pcie-common.yaml# 82 - if: 83 properties: 84 compatible: 85 contains: 86 enum: 87 - qcom,pcie-apq8064 88 then: 89 properties: 90 clocks: 91 maxItems: 3 92 clock-names: 93 maxItems: 3 94 resets: 95 maxItems: 5 96 reset-names: 97 maxItems: 5 98 else: 99 properties: 100 clocks: 101 minItems: 5 102 clock-names: 103 minItems: 5 104 resets: 105 minItems: 6 106 reset-names: 107 minItems: 6 108 109unevaluatedProperties: false 110 111examples: 112 - | 113 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 114 #include <dt-bindings/gpio/gpio.h> 115 #include <dt-bindings/interrupt-controller/arm-gic.h> 116 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 117 118 pcie@1b500000 { 119 compatible = "qcom,pcie-apq8064"; 120 reg = <0x1b500000 0x1000>, 121 <0x1b502000 0x80>, 122 <0x1b600000 0x100>, 123 <0x0ff00000 0x100000>; 124 reg-names = "dbi", "elbi", "parf", "config"; 125 ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00100000>, /* I/O */ 126 <0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* mem */ 127 128 device_type = "pci"; 129 linux,pci-domain = <0>; 130 bus-range = <0x00 0xff>; 131 num-lanes = <1>; 132 #address-cells = <3>; 133 #size-cells = <2>; 134 135 clocks = <&gcc PCIE_A_CLK>, 136 <&gcc PCIE_H_CLK>, 137 <&gcc PCIE_PHY_REF_CLK>; 138 clock-names = "core", "iface", "phy"; 139 140 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>; 141 interrupt-names = "msi"; 142 #interrupt-cells = <1>; 143 interrupt-map-mask = <0 0 0 0x7>; 144 interrupt-map = <0 0 0 1 &intc GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 145 <0 0 0 2 &intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 146 <0 0 0 3 &intc GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 147 <0 0 0 4 &intc GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 148 149 resets = <&gcc PCIE_ACLK_RESET>, 150 <&gcc PCIE_HCLK_RESET>, 151 <&gcc PCIE_POR_RESET>, 152 <&gcc PCIE_PCI_RESET>, 153 <&gcc PCIE_PHY_RESET>; 154 reset-names = "axi", "ahb", "por", "pci", "phy"; 155 156 perst-gpios = <&tlmm_pinmux 27 GPIO_ACTIVE_LOW>; 157 vdda-supply = <&pm8921_s3>; 158 vdda_phy-supply = <&pm8921_lvs6>; 159 vdda_refclk-supply = <&v3p3_fixed>; 160 161 pcie@0 { 162 device_type = "pci"; 163 reg = <0x0 0x0 0x0 0x0 0x0>; 164 bus-range = <0x01 0xff>; 165 166 #address-cells = <3>; 167 #size-cells = <2>; 168 ranges; 169 }; 170 }; 171