1*8454478eSJoey Lu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*8454478eSJoey Lu%YAML 1.2 3*8454478eSJoey Lu--- 4*8454478eSJoey Lu$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml# 5*8454478eSJoey Lu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8454478eSJoey Lu 7*8454478eSJoey Lutitle: Nuvoton DWMAC glue layer controller 8*8454478eSJoey Lu 9*8454478eSJoey Lumaintainers: 10*8454478eSJoey Lu - Joey Lu <yclu4@nuvoton.com> 11*8454478eSJoey Lu 12*8454478eSJoey Ludescription: 13*8454478eSJoey Lu Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on 14*8454478eSJoey Lu Synopsys DesignWare MAC (version 3.73a). 15*8454478eSJoey Lu 16*8454478eSJoey Luselect: 17*8454478eSJoey Lu properties: 18*8454478eSJoey Lu compatible: 19*8454478eSJoey Lu contains: 20*8454478eSJoey Lu enum: 21*8454478eSJoey Lu - nuvoton,ma35d1-dwmac 22*8454478eSJoey Lu required: 23*8454478eSJoey Lu - compatible 24*8454478eSJoey Lu 25*8454478eSJoey LuallOf: 26*8454478eSJoey Lu - $ref: snps,dwmac.yaml# 27*8454478eSJoey Lu 28*8454478eSJoey Luproperties: 29*8454478eSJoey Lu compatible: 30*8454478eSJoey Lu items: 31*8454478eSJoey Lu - const: nuvoton,ma35d1-dwmac 32*8454478eSJoey Lu - const: snps,dwmac-3.70a 33*8454478eSJoey Lu 34*8454478eSJoey Lu reg: 35*8454478eSJoey Lu maxItems: 1 36*8454478eSJoey Lu description: 37*8454478eSJoey Lu Register range should be one of the GMAC interface. 38*8454478eSJoey Lu 39*8454478eSJoey Lu interrupts: 40*8454478eSJoey Lu maxItems: 1 41*8454478eSJoey Lu 42*8454478eSJoey Lu clocks: 43*8454478eSJoey Lu items: 44*8454478eSJoey Lu - description: MAC clock 45*8454478eSJoey Lu - description: PTP clock 46*8454478eSJoey Lu 47*8454478eSJoey Lu clock-names: 48*8454478eSJoey Lu items: 49*8454478eSJoey Lu - const: stmmaceth 50*8454478eSJoey Lu - const: ptp_ref 51*8454478eSJoey Lu 52*8454478eSJoey Lu nuvoton,sys: 53*8454478eSJoey Lu $ref: /schemas/types.yaml#/definitions/phandle-array 54*8454478eSJoey Lu items: 55*8454478eSJoey Lu - items: 56*8454478eSJoey Lu - description: phandle to access syscon registers. 57*8454478eSJoey Lu - description: GMAC interface ID. 58*8454478eSJoey Lu enum: 59*8454478eSJoey Lu - 0 60*8454478eSJoey Lu - 1 61*8454478eSJoey Lu description: 62*8454478eSJoey Lu A phandle to the syscon with one argument that configures system registers 63*8454478eSJoey Lu for MA35D1's two GMACs. The argument specifies the GMAC interface ID. 64*8454478eSJoey Lu 65*8454478eSJoey Lu resets: 66*8454478eSJoey Lu maxItems: 1 67*8454478eSJoey Lu 68*8454478eSJoey Lu reset-names: 69*8454478eSJoey Lu items: 70*8454478eSJoey Lu - const: stmmaceth 71*8454478eSJoey Lu 72*8454478eSJoey Lu phy-mode: 73*8454478eSJoey Lu enum: 74*8454478eSJoey Lu - rmii 75*8454478eSJoey Lu - rgmii 76*8454478eSJoey Lu - rgmii-id 77*8454478eSJoey Lu - rgmii-txid 78*8454478eSJoey Lu - rgmii-rxid 79*8454478eSJoey Lu 80*8454478eSJoey Lu tx-internal-delay-ps: 81*8454478eSJoey Lu default: 0 82*8454478eSJoey Lu minimum: 0 83*8454478eSJoey Lu maximum: 2000 84*8454478eSJoey Lu description: 85*8454478eSJoey Lu RGMII TX path delay used only when PHY operates in RGMII mode with 86*8454478eSJoey Lu internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds. 87*8454478eSJoey Lu Allowed values are from 0 to 2000. 88*8454478eSJoey Lu 89*8454478eSJoey Lu rx-internal-delay-ps: 90*8454478eSJoey Lu default: 0 91*8454478eSJoey Lu minimum: 0 92*8454478eSJoey Lu maximum: 2000 93*8454478eSJoey Lu description: 94*8454478eSJoey Lu RGMII RX path delay used only when PHY operates in RGMII mode with 95*8454478eSJoey Lu internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds. 96*8454478eSJoey Lu Allowed values are from 0 to 2000. 97*8454478eSJoey Lu 98*8454478eSJoey Lurequired: 99*8454478eSJoey Lu - clocks 100*8454478eSJoey Lu - clock-names 101*8454478eSJoey Lu - nuvoton,sys 102*8454478eSJoey Lu - resets 103*8454478eSJoey Lu - reset-names 104*8454478eSJoey Lu - phy-mode 105*8454478eSJoey Lu 106*8454478eSJoey LuunevaluatedProperties: false 107*8454478eSJoey Lu 108*8454478eSJoey Luexamples: 109*8454478eSJoey Lu - | 110*8454478eSJoey Lu #include <dt-bindings/interrupt-controller/arm-gic.h> 111*8454478eSJoey Lu #include <dt-bindings/clock/nuvoton,ma35d1-clk.h> 112*8454478eSJoey Lu #include <dt-bindings/reset/nuvoton,ma35d1-reset.h> 113*8454478eSJoey Lu ethernet@40120000 { 114*8454478eSJoey Lu compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a"; 115*8454478eSJoey Lu reg = <0x40120000 0x10000>; 116*8454478eSJoey Lu interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 117*8454478eSJoey Lu interrupt-names = "macirq"; 118*8454478eSJoey Lu clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>; 119*8454478eSJoey Lu clock-names = "stmmaceth", "ptp_ref"; 120*8454478eSJoey Lu 121*8454478eSJoey Lu nuvoton,sys = <&sys 0>; 122*8454478eSJoey Lu resets = <&sys MA35D1_RESET_GMAC0>; 123*8454478eSJoey Lu reset-names = "stmmaceth"; 124*8454478eSJoey Lu snps,multicast-filter-bins = <0>; 125*8454478eSJoey Lu snps,perfect-filter-entries = <8>; 126*8454478eSJoey Lu rx-fifo-depth = <4096>; 127*8454478eSJoey Lu tx-fifo-depth = <2048>; 128*8454478eSJoey Lu 129*8454478eSJoey Lu phy-mode = "rgmii-id"; 130*8454478eSJoey Lu phy-handle = <ð_phy0>; 131*8454478eSJoey Lu mdio { 132*8454478eSJoey Lu compatible = "snps,dwmac-mdio"; 133*8454478eSJoey Lu #address-cells = <1>; 134*8454478eSJoey Lu #size-cells = <0>; 135*8454478eSJoey Lu 136*8454478eSJoey Lu eth_phy0: ethernet-phy@0 { 137*8454478eSJoey Lu reg = <0>; 138*8454478eSJoey Lu }; 139*8454478eSJoey Lu }; 140*8454478eSJoey Lu }; 141