xref: /linux/Documentation/devicetree/bindings/net/nuvoton,ma35d1-dwmac.yaml (revision 0fc8f6200d2313278fbf4539bbab74677c685531) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/nuvoton,ma35d1-dwmac.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Nuvoton DWMAC glue layer controller
8
9maintainers:
10  - Joey Lu <yclu4@nuvoton.com>
11
12description:
13  Nuvoton 10/100/1000Mbps Gigabit Ethernet MAC Controller is based on
14  Synopsys DesignWare MAC (version 3.73a).
15
16select:
17  properties:
18    compatible:
19      contains:
20        enum:
21          - nuvoton,ma35d1-dwmac
22  required:
23    - compatible
24
25allOf:
26  - $ref: snps,dwmac.yaml#
27
28properties:
29  compatible:
30    items:
31      - const: nuvoton,ma35d1-dwmac
32      - const: snps,dwmac-3.70a
33
34  reg:
35    maxItems: 1
36    description:
37      Register range should be one of the GMAC interface.
38
39  interrupts:
40    maxItems: 1
41
42  clocks:
43    items:
44      - description: MAC clock
45      - description: PTP clock
46
47  clock-names:
48    items:
49      - const: stmmaceth
50      - const: ptp_ref
51
52  nuvoton,sys:
53    $ref: /schemas/types.yaml#/definitions/phandle-array
54    items:
55      - items:
56          - description: phandle to access syscon registers.
57          - description: GMAC interface ID.
58            enum:
59              - 0
60              - 1
61    description:
62      A phandle to the syscon with one argument that configures system registers
63      for MA35D1's two GMACs. The argument specifies the GMAC interface ID.
64
65  resets:
66    maxItems: 1
67
68  reset-names:
69    items:
70      - const: stmmaceth
71
72  phy-mode:
73    enum:
74      - rmii
75      - rgmii
76      - rgmii-id
77      - rgmii-txid
78      - rgmii-rxid
79
80  tx-internal-delay-ps:
81    default: 0
82    minimum: 0
83    maximum: 2000
84    description:
85      RGMII TX path delay used only when PHY operates in RGMII mode with
86      internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
87      Allowed values are from 0 to 2000.
88
89  rx-internal-delay-ps:
90    default: 0
91    minimum: 0
92    maximum: 2000
93    description:
94      RGMII RX path delay used only when PHY operates in RGMII mode with
95      internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
96      Allowed values are from 0 to 2000.
97
98required:
99  - clocks
100  - clock-names
101  - nuvoton,sys
102  - resets
103  - reset-names
104  - phy-mode
105
106unevaluatedProperties: false
107
108examples:
109  - |
110    #include <dt-bindings/interrupt-controller/arm-gic.h>
111    #include <dt-bindings/clock/nuvoton,ma35d1-clk.h>
112    #include <dt-bindings/reset/nuvoton,ma35d1-reset.h>
113    ethernet@40120000 {
114        compatible = "nuvoton,ma35d1-dwmac", "snps,dwmac-3.70a";
115        reg = <0x40120000 0x10000>;
116        interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
117        interrupt-names = "macirq";
118        clocks = <&clk EMAC0_GATE>, <&clk EPLL_DIV8>;
119        clock-names = "stmmaceth", "ptp_ref";
120
121        nuvoton,sys = <&sys 0>;
122        resets = <&sys MA35D1_RESET_GMAC0>;
123        reset-names = "stmmaceth";
124        snps,multicast-filter-bins = <0>;
125        snps,perfect-filter-entries = <8>;
126        rx-fifo-depth = <4096>;
127        tx-fifo-depth = <2048>;
128
129        phy-mode = "rgmii-id";
130        phy-handle = <&eth_phy0>;
131        mdio {
132            compatible = "snps,dwmac-mdio";
133            #address-cells = <1>;
134            #size-cells = <0>;
135
136            eth_phy0: ethernet-phy@0 {
137                reg = <0>;
138            };
139        };
140    };
141