1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/microchip,lan8650.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Microchip LAN8650/1 10BASE-T1S MACPHY Ethernet Controllers 8 9maintainers: 10 - Parthiban Veerasooran <parthiban.veerasooran@microchip.com> 11 12description: 13 The LAN8650/1 combines a Media Access Controller (MAC) and an Ethernet 14 PHY to enable 10BASE‑T1S networks. The Ethernet Media Access Controller 15 (MAC) module implements a 10 Mbps half duplex Ethernet MAC, compatible 16 with the IEEE 802.3 standard and a 10BASE-T1S physical layer transceiver 17 integrated into the LAN8650/1. The communication between the Host and 18 the MAC-PHY is specified in the OPEN Alliance 10BASE-T1x MACPHY Serial 19 Interface (TC6). 20 21allOf: 22 - $ref: /schemas/net/ethernet-controller.yaml# 23 - $ref: /schemas/spi/spi-peripheral-props.yaml# 24 25properties: 26 compatible: 27 oneOf: 28 - const: microchip,lan8650 29 - items: 30 - const: microchip,lan8651 31 - const: microchip,lan8650 32 33 reg: 34 maxItems: 1 35 36 interrupts: 37 description: 38 Interrupt from MAC-PHY asserted in the event of Receive Chunks 39 Available, Transmit Chunk Credits Available and Extended Status 40 Event. 41 maxItems: 1 42 43 spi-max-frequency: 44 minimum: 15000000 45 maximum: 25000000 46 47required: 48 - compatible 49 - reg 50 - interrupts 51 - spi-max-frequency 52 53unevaluatedProperties: false 54 55examples: 56 - | 57 #include <dt-bindings/interrupt-controller/irq.h> 58 #include <dt-bindings/gpio/gpio.h> 59 60 spi { 61 #address-cells = <1>; 62 #size-cells = <0>; 63 64 ethernet@0 { 65 compatible = "microchip,lan8651", "microchip,lan8650"; 66 reg = <0>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <ð0_pins>; 69 interrupt-parent = <&gpio>; 70 interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 71 local-mac-address = [04 05 06 01 02 03]; 72 spi-max-frequency = <15000000>; 73 }; 74 }; 75