1*dff8af7cSCharan Pedumuru# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*dff8af7cSCharan Pedumuru%YAML 1.2 3*dff8af7cSCharan Pedumuru--- 4*dff8af7cSCharan Pedumuru$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml# 5*dff8af7cSCharan Pedumuru$schema: http://devicetree.org/meta-schemas/core.yaml# 6*dff8af7cSCharan Pedumuru 7*dff8af7cSCharan Pedumurutitle: NVIDIA Tegra NAND Flash Controller 8*dff8af7cSCharan Pedumuru 9*dff8af7cSCharan Pedumurumaintainers: 10*dff8af7cSCharan Pedumuru - Jonathan Hunter <jonathanh@nvidia.com> 11*dff8af7cSCharan Pedumuru 12*dff8af7cSCharan PedumuruallOf: 13*dff8af7cSCharan Pedumuru - $ref: nand-controller.yaml 14*dff8af7cSCharan Pedumuru 15*dff8af7cSCharan Pedumurudescription: 16*dff8af7cSCharan Pedumuru The NVIDIA NAND controller provides an interface between NVIDIA SoCs 17*dff8af7cSCharan Pedumuru and raw NAND flash devices. It supports standard NAND operations, 18*dff8af7cSCharan Pedumuru hardware-assisted ECC, OOB data access, and DMA transfers, and 19*dff8af7cSCharan Pedumuru integrates with the Linux MTD NAND subsystem for reliable flash management. 20*dff8af7cSCharan Pedumuru 21*dff8af7cSCharan Pedumuruproperties: 22*dff8af7cSCharan Pedumuru compatible: 23*dff8af7cSCharan Pedumuru const: nvidia,tegra20-nand 24*dff8af7cSCharan Pedumuru 25*dff8af7cSCharan Pedumuru reg: 26*dff8af7cSCharan Pedumuru maxItems: 1 27*dff8af7cSCharan Pedumuru 28*dff8af7cSCharan Pedumuru interrupts: 29*dff8af7cSCharan Pedumuru maxItems: 1 30*dff8af7cSCharan Pedumuru 31*dff8af7cSCharan Pedumuru clocks: 32*dff8af7cSCharan Pedumuru maxItems: 1 33*dff8af7cSCharan Pedumuru 34*dff8af7cSCharan Pedumuru clock-names: 35*dff8af7cSCharan Pedumuru items: 36*dff8af7cSCharan Pedumuru - const: nand 37*dff8af7cSCharan Pedumuru 38*dff8af7cSCharan Pedumuru resets: 39*dff8af7cSCharan Pedumuru maxItems: 1 40*dff8af7cSCharan Pedumuru 41*dff8af7cSCharan Pedumuru reset-names: 42*dff8af7cSCharan Pedumuru items: 43*dff8af7cSCharan Pedumuru - const: nand 44*dff8af7cSCharan Pedumuru 45*dff8af7cSCharan Pedumuru power-domains: 46*dff8af7cSCharan Pedumuru maxItems: 1 47*dff8af7cSCharan Pedumuru 48*dff8af7cSCharan Pedumuru operating-points-v2: 49*dff8af7cSCharan Pedumuru maxItems: 1 50*dff8af7cSCharan Pedumuru 51*dff8af7cSCharan PedumurupatternProperties: 52*dff8af7cSCharan Pedumuru '^nand@': 53*dff8af7cSCharan Pedumuru type: object 54*dff8af7cSCharan Pedumuru description: Individual NAND chip connected to the NAND controller 55*dff8af7cSCharan Pedumuru $ref: raw-nand-chip.yaml# 56*dff8af7cSCharan Pedumuru 57*dff8af7cSCharan Pedumuru properties: 58*dff8af7cSCharan Pedumuru reg: 59*dff8af7cSCharan Pedumuru maximum: 5 60*dff8af7cSCharan Pedumuru 61*dff8af7cSCharan Pedumuru unevaluatedProperties: false 62*dff8af7cSCharan Pedumuru 63*dff8af7cSCharan Pedumururequired: 64*dff8af7cSCharan Pedumuru - compatible 65*dff8af7cSCharan Pedumuru - reg 66*dff8af7cSCharan Pedumuru - interrupts 67*dff8af7cSCharan Pedumuru - clocks 68*dff8af7cSCharan Pedumuru - clock-names 69*dff8af7cSCharan Pedumuru - resets 70*dff8af7cSCharan Pedumuru - reset-names 71*dff8af7cSCharan Pedumuru 72*dff8af7cSCharan PedumuruunevaluatedProperties: false 73*dff8af7cSCharan Pedumuru 74*dff8af7cSCharan Pedumuruexamples: 75*dff8af7cSCharan Pedumuru - | 76*dff8af7cSCharan Pedumuru #include <dt-bindings/interrupt-controller/arm-gic.h> 77*dff8af7cSCharan Pedumuru #include <dt-bindings/clock/tegra20-car.h> 78*dff8af7cSCharan Pedumuru #include <dt-bindings/gpio/tegra-gpio.h> 79*dff8af7cSCharan Pedumuru 80*dff8af7cSCharan Pedumuru nand-controller@70008000 { 81*dff8af7cSCharan Pedumuru compatible = "nvidia,tegra20-nand"; 82*dff8af7cSCharan Pedumuru reg = <0x70008000 0x100>; 83*dff8af7cSCharan Pedumuru interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 84*dff8af7cSCharan Pedumuru clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; 85*dff8af7cSCharan Pedumuru clock-names = "nand"; 86*dff8af7cSCharan Pedumuru resets = <&tegra_car 13>; 87*dff8af7cSCharan Pedumuru reset-names = "nand"; 88*dff8af7cSCharan Pedumuru #address-cells = <1>; 89*dff8af7cSCharan Pedumuru #size-cells = <0>; 90*dff8af7cSCharan Pedumuru 91*dff8af7cSCharan Pedumuru nand@0 { 92*dff8af7cSCharan Pedumuru reg = <0>; 93*dff8af7cSCharan Pedumuru #address-cells = <1>; 94*dff8af7cSCharan Pedumuru #size-cells = <1>; 95*dff8af7cSCharan Pedumuru nand-bus-width = <8>; 96*dff8af7cSCharan Pedumuru nand-on-flash-bbt; 97*dff8af7cSCharan Pedumuru nand-ecc-algo = "bch"; 98*dff8af7cSCharan Pedumuru nand-ecc-strength = <8>; 99*dff8af7cSCharan Pedumuru wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; 100*dff8af7cSCharan Pedumuru }; 101*dff8af7cSCharan Pedumuru }; 102*dff8af7cSCharan Pedumuru... 103