xref: /linux/Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml (revision 6589b3d76db2d6adbf8f2084c303fb24252a0dc6)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra NAND Flash Controller
8
9maintainers:
10  - Jonathan Hunter <jonathanh@nvidia.com>
11
12allOf:
13  - $ref: nand-controller.yaml
14
15description:
16  The NVIDIA NAND controller provides an interface between NVIDIA SoCs
17  and raw NAND flash devices. It supports standard NAND operations,
18  hardware-assisted ECC, OOB data access, and DMA transfers, and
19  integrates with the Linux MTD NAND subsystem for reliable flash management.
20
21properties:
22  compatible:
23    const: nvidia,tegra20-nand
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    maxItems: 1
30
31  clocks:
32    maxItems: 1
33
34  clock-names:
35    items:
36      - const: nand
37
38  resets:
39    maxItems: 1
40
41  reset-names:
42    items:
43      - const: nand
44
45  power-domains:
46    maxItems: 1
47
48  operating-points-v2:
49    maxItems: 1
50
51patternProperties:
52  '^nand@':
53    type: object
54    description: Individual NAND chip connected to the NAND controller
55    $ref: raw-nand-chip.yaml#
56
57    properties:
58      reg:
59        maximum: 5
60
61    unevaluatedProperties: false
62
63required:
64  - compatible
65  - reg
66  - interrupts
67  - clocks
68  - clock-names
69  - resets
70  - reset-names
71
72unevaluatedProperties: false
73
74examples:
75  - |
76    #include <dt-bindings/interrupt-controller/arm-gic.h>
77    #include <dt-bindings/clock/tegra20-car.h>
78    #include <dt-bindings/gpio/tegra-gpio.h>
79
80    nand-controller@70008000 {
81        compatible = "nvidia,tegra20-nand";
82        reg = <0x70008000 0x100>;
83        interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
84        clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
85        clock-names = "nand";
86        resets = <&tegra_car 13>;
87        reset-names = "nand";
88        #address-cells = <1>;
89        #size-cells = <0>;
90
91        nand@0 {
92            reg = <0>;
93            #address-cells = <1>;
94            #size-cells = <1>;
95            nand-bus-width = <8>;
96            nand-on-flash-bbt;
97            nand-ecc-algo = "bch";
98            nand-ecc-strength = <8>;
99            wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
100        };
101    };
102...
103