1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdio.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Amlogic Meson6, Meson8 and Meson8b SDIO/MMC controller 8 9description: | 10 The highspeed MMC host controller on Amlogic SoCs provides an interface 11 for MMC, SD, SDIO and SDHC types of memory cards. 12 13 Supported maximum speeds are the ones of the eMMC standard 4.41 as well 14 as the speed of SD standard 2.0. 15 16 The hardware provides an internal "mux" which allows up to three slots 17 to be controlled. Only one slot can be accessed at a time. 18 19maintainers: 20 - Neil Armstrong <neil.armstrong@linaro.org> 21 22properties: 23 compatible: 24 items: 25 - enum: 26 - amlogic,meson8-sdio 27 - amlogic,meson8b-sdio 28 - const: amlogic,meson-mx-sdio 29 30 reg: 31 maxItems: 1 32 33 interrupts: 34 maxItems: 1 35 36 clocks: 37 maxItems: 2 38 39 clock-names: 40 items: 41 - const: core 42 - const: clkin 43 44 "#address-cells": 45 const: 1 46 47 "#size-cells": 48 const: 0 49 50patternProperties: 51 "slot@[0-2]$": 52 $ref: mmc-slot.yaml# 53 description: 54 A node for each slot provided by the MMC controller 55 56 properties: 57 reg: 58 enum: [0, 1, 2] 59 60 bus-width: 61 enum: [1, 4] 62 63 unevaluatedProperties: false 64 65required: 66 - compatible 67 - reg 68 - interrupts 69 - clocks 70 - clock-names 71 - "#address-cells" 72 - "#size-cells" 73 74additionalProperties: false 75 76examples: 77 - | 78 #include <dt-bindings/interrupt-controller/irq.h> 79 #include <dt-bindings/interrupt-controller/arm-gic.h> 80 mmc@c1108c20 { 81 compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio"; 82 reg = <0xc1108c20 0x20>; 83 interrupts = <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>; 84 clocks = <&clk_core>, <&clk_in>; 85 clock-names = "core", "clkin"; 86 #address-cells = <1>; 87 #size-cells = <0>; 88 89 slot@1 { 90 compatible = "mmc-slot"; 91 reg = <1>; 92 bus-width = <4>; 93 }; 94 }; 95