xref: /linux/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml (revision 22c55fb9eb92395d999b8404d73e58540d11bdd8)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Memory controller (MEMC) for Broadcom STB
8
9maintainers:
10  - Florian Fainelli <f.fainelli@gmail.com>
11
12properties:
13  compatible:
14    oneOf:
15      - description: Revision > 2.1 controllers
16        items:
17          - enum:
18              - brcm,brcmstb-memc-ddr-rev-b.2.2
19              - brcm,brcmstb-memc-ddr-rev-b.2.3
20              - brcm,brcmstb-memc-ddr-rev-b.2.5
21              - brcm,brcmstb-memc-ddr-rev-b.2.6
22              - brcm,brcmstb-memc-ddr-rev-b.2.7
23              - brcm,brcmstb-memc-ddr-rev-b.2.8
24              - brcm,brcmstb-memc-ddr-rev-b.3.0
25              - brcm,brcmstb-memc-ddr-rev-b.3.1
26              - brcm,brcmstb-memc-ddr-rev-c.1.0
27              - brcm,brcmstb-memc-ddr-rev-c.1.1
28              - brcm,brcmstb-memc-ddr-rev-c.1.2
29              - brcm,brcmstb-memc-ddr-rev-c.1.3
30              - brcm,brcmstb-memc-ddr-rev-c.1.4
31          - const: brcm,brcmstb-memc-ddr-rev-b.2.1
32          - const: brcm,brcmstb-memc-ddr
33      - description: Revision 2.1 controllers
34        items:
35          - const: brcm,brcmstb-memc-ddr-rev-b.2.1
36          - const: brcm,brcmstb-memc-ddr
37      - description: Revision 2.0 controllers
38        items:
39          - const: brcm,brcmstb-memc-ddr-rev-b.2.0
40          - const: brcm,brcmstb-memc-ddr
41      - description: Revision 1.x controllers
42        items:
43          - const: brcm,brcmstb-memc-ddr-rev-b.1.x
44          - const: brcm,brcmstb-memc-ddr
45
46  reg:
47    maxItems: 1
48
49  clock-frequency:
50    description: DDR PHY frequency in Hz
51
52required:
53  - compatible
54  - reg
55
56additionalProperties: false
57
58examples:
59  - |
60    memory-controller@9902000 {
61        compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1",
62                     "brcm,brcmstb-memc-ddr-rev-b.2.1",
63                     "brcm,brcmstb-memc-ddr";
64        reg = <0x9902000 0x600>;
65        clock-frequency = <2133000000>;
66    };
67