xref: /linux/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Memory controller (MEMC) for Broadcom STB
8
9maintainers:
10  - Florian Fainelli <f.fainelli@gmail.com>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - brcm,brcmstb-memc-ddr-rev-b.1.x
17          - brcm,brcmstb-memc-ddr-rev-b.2.0
18          - brcm,brcmstb-memc-ddr-rev-b.2.1
19          - brcm,brcmstb-memc-ddr-rev-b.2.2
20          - brcm,brcmstb-memc-ddr-rev-b.2.3
21          - brcm,brcmstb-memc-ddr-rev-b.2.5
22          - brcm,brcmstb-memc-ddr-rev-b.2.6
23          - brcm,brcmstb-memc-ddr-rev-b.2.7
24          - brcm,brcmstb-memc-ddr-rev-b.2.8
25          - brcm,brcmstb-memc-ddr-rev-b.3.0
26          - brcm,brcmstb-memc-ddr-rev-b.3.1
27          - brcm,brcmstb-memc-ddr-rev-c.1.0
28          - brcm,brcmstb-memc-ddr-rev-c.1.1
29          - brcm,brcmstb-memc-ddr-rev-c.1.2
30          - brcm,brcmstb-memc-ddr-rev-c.1.3
31          - brcm,brcmstb-memc-ddr-rev-c.1.4
32      - const: brcm,brcmstb-memc-ddr
33
34  reg:
35    maxItems: 1
36
37  clock-frequency:
38    description: DDR PHY frequency in Hz
39
40required:
41  - compatible
42  - reg
43
44additionalProperties: false
45
46examples:
47  - |
48    memory-controller@9902000 {
49        compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", "brcm,brcmstb-memc-ddr";
50        reg = <0x9902000 0x600>;
51        clock-frequency = <2133000000>;
52    };
53