xref: /linux/Documentation/devicetree/bindings/media/ti,omap3isp.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments OMAP 3 Image Signal Processor (ISP)

maintainers:
  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  - Sakari Ailus <sakari.ailus@iki.fi>

description:
  The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.

properties:
  compatible:
    const: ti,omap3-isp

  reg:
    items:
      - description: Core ISP registers up to the end of the SBL block
      - description: CSI PHYs and receivers registers

  interrupts:
    maxItems: 1

  iommus:
    maxItems: 1

  syscon:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: phandle to System Control Module
          - description: register offset to Complex I/O or CSI-PHY register
    description:
      Phandle and register offset to the Complex I/O or CSI-PHY register

  ti,phy-type:
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [0, 1]
    description:
      0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
      1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)

  '#clock-cells':
    const: 1
    description:
      The ISP provides two external clocks, cam_xclka and cam_xclkb,
      at indices 0 and 1 respectively.

  vdd-csiphy1-supply:
    description: Voltage supply of the CSI-2 PHY 1

  vdd-csiphy2-supply:
    description: Voltage supply of the CSI-2 PHY 2

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: Parallel (CCDC) interface

        properties:
          endpoint:
            $ref: /schemas/media/video-interfaces.yaml#
            unevaluatedProperties: false

      port@1:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: |
          CSIPHY1 interface:
            OMAP 3630: CSI2C / CCP2B
            OMAP 3430: CSI1 (CSIb)

        properties:
          endpoint:
            $ref: /schemas/media/video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              lane-polarities:
                minItems: 2
                maxItems: 3

              data-lanes:
                minItems: 1
                maxItems: 2
                items:
                  minimum: 1
                  maximum: 3

              clock-lanes:
                minimum: 1
                maximum: 3

      port@2:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: |
          CSIPHY2 interface:
            OMAP 3630: CSI2A / CCP2B
            OMAP 3430: CSI2 (CSIa)

        properties:
          endpoint:
            $ref: /schemas/media/video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              lane-polarities:
                minItems: 2
                maxItems: 3

              data-lanes:
                minItems: 1
                maxItems: 2
                items:
                  minimum: 1
                  maximum: 3

              clock-lanes:
                minimum: 1
                maximum: 3

required:
  - compatible
  - reg
  - interrupts
  - iommus
  - syscon
  - ti,phy-type
  - '#clock-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/media/omap3-isp.h>

    isp@480bc000 {
        compatible = "ti,omap3-isp";
        reg = <0x480bc000 0x12fc>,
              <0x480bd800 0x0600>;
        interrupts = <24>;
        iommus = <&mmu_isp>;
        syscon = <&scm_conf 0x2f0>;
        ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
        #clock-cells = <1>;
        vdd-csiphy1-supply = <&vaux2>;
        vdd-csiphy2-supply = <&vaux2>;

        ports {
            #address-cells = <1>;
            #size-cells = <0>;

            port@0 {
                reg = <0>;
                parallel_ep: endpoint {
                    remote-endpoint = <&parallel>;
                };
            };

            port@1 {
                reg = <1>;
                csi1_ep: endpoint {
                    remote-endpoint = <&smia_1>;
                    clock-lanes = <1>;
                    data-lanes = <2>;
                    lane-polarities = <0 0>;
                };
            };

            port@2 {
                reg = <2>;
                csi2a_ep: endpoint {
                    remote-endpoint = <&smia_2>;
                    clock-lanes = <2>;
                    data-lanes = <1 3>;
                    lane-polarities = <1 1 1>;
                };
            };
        };
    };