xref: /linux/Documentation/devicetree/bindings/media/ti,omap3isp.yaml (revision c17ee635fd3a482b2ad2bf5e269755c2eae5f25e) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments OMAP 3 Image Signal Processor (ISP)
8
9maintainers:
10  - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11  - Sakari Ailus <sakari.ailus@iki.fi>
12
13description:
14  The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.
15
16properties:
17  compatible:
18    const: ti,omap3-isp
19
20  reg:
21    items:
22      - description: Core ISP registers up to the end of the SBL block
23      - description: CSI PHYs and receivers registers
24
25  interrupts:
26    maxItems: 1
27
28  iommus:
29    maxItems: 1
30
31  syscon:
32    $ref: /schemas/types.yaml#/definitions/phandle-array
33    items:
34      - items:
35          - description: phandle to System Control Module
36          - description: register offset to Complex I/O or CSI-PHY register
37    description:
38      Phandle and register offset to the Complex I/O or CSI-PHY register
39
40  ti,phy-type:
41    $ref: /schemas/types.yaml#/definitions/uint32
42    enum: [0, 1]
43    description:
44      0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
45      1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)
46
47  '#clock-cells':
48    const: 1
49    description:
50      The ISP provides two external clocks, cam_xclka and cam_xclkb,
51      at indices 0 and 1 respectively.
52
53  vdd-csiphy1-supply:
54    description: Voltage supply of the CSI-2 PHY 1
55
56  vdd-csiphy2-supply:
57    description: Voltage supply of the CSI-2 PHY 2
58
59  ports:
60    $ref: /schemas/graph.yaml#/properties/ports
61
62    properties:
63      port@0:
64        $ref: /schemas/graph.yaml#/$defs/port-base
65        unevaluatedProperties: false
66        description: Parallel (CCDC) interface
67
68        properties:
69          endpoint:
70            $ref: /schemas/media/video-interfaces.yaml#
71            unevaluatedProperties: false
72
73      port@1:
74        $ref: /schemas/graph.yaml#/$defs/port-base
75        unevaluatedProperties: false
76        description: |
77          CSIPHY1 interface:
78            OMAP 3630: CSI2C / CCP2B
79            OMAP 3430: CSI1 (CSIb)
80
81        properties:
82          endpoint:
83            $ref: /schemas/media/video-interfaces.yaml#
84            unevaluatedProperties: false
85
86            properties:
87              lane-polarities:
88                minItems: 2
89                maxItems: 3
90
91              data-lanes:
92                minItems: 1
93                maxItems: 2
94                items:
95                  minimum: 1
96                  maximum: 3
97
98              clock-lanes:
99                minimum: 1
100                maximum: 3
101
102      port@2:
103        $ref: /schemas/graph.yaml#/$defs/port-base
104        unevaluatedProperties: false
105        description: |
106          CSIPHY2 interface:
107            OMAP 3630: CSI2A / CCP2B
108            OMAP 3430: CSI2 (CSIa)
109
110        properties:
111          endpoint:
112            $ref: /schemas/media/video-interfaces.yaml#
113            unevaluatedProperties: false
114
115            properties:
116              lane-polarities:
117                minItems: 2
118                maxItems: 3
119
120              data-lanes:
121                minItems: 1
122                maxItems: 2
123                items:
124                  minimum: 1
125                  maximum: 3
126
127              clock-lanes:
128                minimum: 1
129                maximum: 3
130
131required:
132  - compatible
133  - reg
134  - interrupts
135  - iommus
136  - syscon
137  - ti,phy-type
138  - '#clock-cells'
139
140additionalProperties: false
141
142examples:
143  - |
144    #include <dt-bindings/media/omap3-isp.h>
145
146    isp@480bc000 {
147        compatible = "ti,omap3-isp";
148        reg = <0x480bc000 0x12fc>,
149              <0x480bd800 0x0600>;
150        interrupts = <24>;
151        iommus = <&mmu_isp>;
152        syscon = <&scm_conf 0x2f0>;
153        ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
154        #clock-cells = <1>;
155        vdd-csiphy1-supply = <&vaux2>;
156        vdd-csiphy2-supply = <&vaux2>;
157
158        ports {
159            #address-cells = <1>;
160            #size-cells = <0>;
161
162            port@0 {
163                reg = <0>;
164                parallel_ep: endpoint {
165                    remote-endpoint = <&parallel>;
166                };
167            };
168
169            port@1 {
170                reg = <1>;
171                csi1_ep: endpoint {
172                    remote-endpoint = <&smia_1>;
173                    clock-lanes = <1>;
174                    data-lanes = <2>;
175                    lane-polarities = <0 0>;
176                };
177            };
178
179            port@2 {
180                reg = <2>;
181                csi2a_ep: endpoint {
182                    remote-endpoint = <&smia_2>;
183                    clock-lanes = <2>;
184                    data-lanes = <1 3>;
185                    lane-polarities = <1 1 1>;
186                };
187            };
188        };
189    };
190