xref: /linux/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml (revision cdd30ebb1b9f36159d66f088b61aee264e649d7a) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8953-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8953 Camera Subsystem (CAMSS)
8
9maintainers:
10  - Barnabas Czeman <barnabas.czeman@mainlining.org>
11
12description:
13  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
14
15properties:
16  compatible:
17    const: qcom,msm8953-camss
18
19  clocks:
20    minItems: 30
21    maxItems: 30
22
23  clock-names:
24    items:
25      - const: ahb
26      - const: csi0
27      - const: csi0_ahb
28      - const: csi0_phy
29      - const: csi0_pix
30      - const: csi0_rdi
31      - const: csi1
32      - const: csi1_ahb
33      - const: csi1_phy
34      - const: csi1_pix
35      - const: csi1_rdi
36      - const: csi2
37      - const: csi2_ahb
38      - const: csi2_phy
39      - const: csi2_pix
40      - const: csi2_rdi
41      - const: csi_vfe0
42      - const: csi_vfe1
43      - const: csiphy0_timer
44      - const: csiphy1_timer
45      - const: csiphy2_timer
46      - const: ispif_ahb
47      - const: micro_ahb
48      - const: top_ahb
49      - const: vfe0
50      - const: vfe0_ahb
51      - const: vfe0_axi
52      - const: vfe1
53      - const: vfe1_ahb
54      - const: vfe1_axi
55
56  interrupts:
57    minItems: 9
58    maxItems: 9
59
60  interrupt-names:
61    items:
62      - const: csid0
63      - const: csid1
64      - const: csid2
65      - const: csiphy0
66      - const: csiphy1
67      - const: csiphy2
68      - const: ispif
69      - const: vfe0
70      - const: vfe1
71
72  iommus:
73    maxItems: 1
74
75  power-domains:
76    items:
77      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
78      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
79
80  power-domain-names:
81    items:
82      - const: vfe0
83      - const: vfe1
84
85  ports:
86    $ref: /schemas/graph.yaml#/properties/ports
87
88    description:
89      CSI input ports.
90
91    properties:
92      port@0:
93        $ref: /schemas/graph.yaml#/$defs/port-base
94        unevaluatedProperties: false
95        description:
96          Input port for receiving CSI data.
97
98        properties:
99          endpoint:
100            $ref: video-interfaces.yaml#
101            unevaluatedProperties: false
102
103            properties:
104              data-lanes:
105                description:
106                  An array of physical data lanes indexes.
107                  Position of an entry determines the logical
108                  lane number, while the value of an entry
109                  indicates physical lane index. Lane swapping
110                  is supported. Physical lane indexes;
111                  0, 2, 3, 4.
112                minItems: 1
113                maxItems: 4
114
115            required:
116              - data-lanes
117
118      port@1:
119        $ref: /schemas/graph.yaml#/$defs/port-base
120        unevaluatedProperties: false
121        description:
122          Input port for receiving CSI data.
123
124        properties:
125          endpoint:
126            $ref: video-interfaces.yaml#
127            unevaluatedProperties: false
128
129            properties:
130              data-lanes:
131                minItems: 1
132                maxItems: 4
133
134            required:
135              - data-lanes
136
137      port@2:
138        $ref: /schemas/graph.yaml#/$defs/port-base
139        unevaluatedProperties: false
140        description:
141          Input port for receiving CSI data.
142
143        properties:
144          endpoint:
145            $ref: video-interfaces.yaml#
146            unevaluatedProperties: false
147
148            properties:
149              data-lanes:
150                minItems: 1
151                maxItems: 4
152
153            required:
154              - data-lanes
155
156  reg:
157    minItems: 13
158    maxItems: 13
159
160  reg-names:
161    items:
162      - const: csi_clk_mux
163      - const: csid0
164      - const: csid1
165      - const: csid2
166      - const: csiphy0
167      - const: csiphy0_clk_mux
168      - const: csiphy1
169      - const: csiphy1_clk_mux
170      - const: csiphy2
171      - const: csiphy2_clk_mux
172      - const: ispif
173      - const: vfe0
174      - const: vfe1
175
176  vdda-supply:
177    description:
178      Definition of the regulator used as analog power supply.
179
180required:
181  - compatible
182  - reg
183  - reg-names
184  - clocks
185  - clock-names
186  - interrupts
187  - interrupt-names
188  - iommus
189  - power-domains
190  - power-domain-names
191  - vdda-supply
192
193additionalProperties: false
194
195examples:
196  - |
197    #include <dt-bindings/interrupt-controller/arm-gic.h>
198    #include <dt-bindings/clock/qcom,gcc-msm8953.h>
199
200    camss: camss@1b00020 {
201        compatible = "qcom,msm8953-camss";
202
203        reg = <0x1b00020 0x10>,
204              <0x1b30000 0x100>,
205              <0x1b30400 0x100>,
206              <0x1b30800 0x100>,
207              <0x1b34000 0x1000>,
208              <0x1b00030 0x4>,
209              <0x1b35000 0x1000>,
210              <0x1b00038 0x4>,
211              <0x1b36000 0x1000>,
212              <0x1b00040 0x4>,
213              <0x1b31000 0x500>,
214              <0x1b10000 0x1000>,
215              <0x1b14000 0x1000>;
216        reg-names = "csi_clk_mux",
217                    "csid0",
218                    "csid1",
219                    "csid2",
220                    "csiphy0",
221                    "csiphy0_clk_mux",
222                    "csiphy1",
223                    "csiphy1_clk_mux",
224                    "csiphy2",
225                    "csiphy2_clk_mux",
226                    "ispif",
227                    "vfe0",
228                    "vfe1";
229
230        clocks = <&gcc GCC_CAMSS_AHB_CLK>,
231                 <&gcc GCC_CAMSS_CSI0_CLK>,
232                 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
233                 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
234                 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
235                 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
236                 <&gcc GCC_CAMSS_CSI1_CLK>,
237                 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
238                 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
239                 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
240                 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
241                 <&gcc GCC_CAMSS_CSI2_CLK>,
242                 <&gcc GCC_CAMSS_CSI2_AHB_CLK>,
243                 <&gcc GCC_CAMSS_CSI2PHY_CLK>,
244                 <&gcc GCC_CAMSS_CSI2PIX_CLK>,
245                 <&gcc GCC_CAMSS_CSI2RDI_CLK>,
246                 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
247                 <&gcc GCC_CAMSS_CSI_VFE1_CLK>,
248                 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
249                 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
250                 <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>,
251                 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
252                 <&gcc GCC_CAMSS_MICRO_AHB_CLK>,
253                 <&gcc GCC_CAMSS_TOP_AHB_CLK>,
254                 <&gcc GCC_CAMSS_VFE0_CLK>,
255                 <&gcc GCC_CAMSS_VFE0_AHB_CLK>,
256                 <&gcc GCC_CAMSS_VFE0_AXI_CLK>,
257                 <&gcc GCC_CAMSS_VFE1_CLK>,
258                 <&gcc GCC_CAMSS_VFE1_AHB_CLK>,
259                 <&gcc GCC_CAMSS_VFE1_AXI_CLK>;
260        clock-names = "ahb",
261                      "csi0",
262                      "csi0_ahb",
263                      "csi0_phy",
264                      "csi0_pix",
265                      "csi0_rdi",
266                      "csi1",
267                      "csi1_ahb",
268                      "csi1_phy",
269                      "csi1_pix",
270                      "csi1_rdi",
271                      "csi2",
272                      "csi2_ahb",
273                      "csi2_phy",
274                      "csi2_pix",
275                      "csi2_rdi",
276                      "csi_vfe0",
277                      "csi_vfe1",
278                      "csiphy0_timer",
279                      "csiphy1_timer",
280                      "csiphy2_timer",
281                      "ispif_ahb",
282                      "micro_ahb",
283                      "top_ahb",
284                      "vfe0",
285                      "vfe0_ahb",
286                      "vfe0_axi",
287                      "vfe1",
288                      "vfe1_ahb",
289                      "vfe1_axi";
290
291        interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
292                     <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
293                     <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
294                     <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
295                     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
296                     <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
297                     <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
298                     <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>,
299                     <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
300        interrupt-names = "csid0",
301                          "csid1",
302                          "csid2",
303                          "csiphy0",
304                          "csiphy1",
305                          "csiphy2",
306                          "ispif",
307                          "vfe0",
308                          "vfe1";
309
310        iommus = <&apps_iommu 0x14>;
311
312        power-domains = <&gcc VFE0_GDSC>,
313                        <&gcc VFE1_GDSC>;
314        power-domain-names = "vfe0", "vfe1";
315
316        vdda-supply = <&reg_2v8>;
317
318        ports {
319            #address-cells = <1>;
320            #size-cells = <0>;
321        };
322    };
323