xref: /linux/Documentation/devicetree/bindings/media/qcom,msm8953-camss.yaml (revision 74f1af95820fc2ee580a775a3a17c416db30b38c) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8953-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8953 Camera Subsystem (CAMSS)
8
9maintainers:
10  - Barnabas Czeman <barnabas.czeman@mainlining.org>
11
12description:
13  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
14
15properties:
16  compatible:
17    const: qcom,msm8953-camss
18
19  clocks:
20    minItems: 30
21    maxItems: 30
22
23  clock-names:
24    items:
25      - const: ahb
26      - const: csi0
27      - const: csi0_ahb
28      - const: csi0_phy
29      - const: csi0_pix
30      - const: csi0_rdi
31      - const: csi1
32      - const: csi1_ahb
33      - const: csi1_phy
34      - const: csi1_pix
35      - const: csi1_rdi
36      - const: csi2
37      - const: csi2_ahb
38      - const: csi2_phy
39      - const: csi2_pix
40      - const: csi2_rdi
41      - const: csi_vfe0
42      - const: csi_vfe1
43      - const: csiphy0_timer
44      - const: csiphy1_timer
45      - const: csiphy2_timer
46      - const: ispif_ahb
47      - const: micro_ahb
48      - const: top_ahb
49      - const: vfe0
50      - const: vfe0_ahb
51      - const: vfe0_axi
52      - const: vfe1
53      - const: vfe1_ahb
54      - const: vfe1_axi
55
56  interrupts:
57    minItems: 9
58    maxItems: 9
59
60  interrupt-names:
61    items:
62      - const: csid0
63      - const: csid1
64      - const: csid2
65      - const: csiphy0
66      - const: csiphy1
67      - const: csiphy2
68      - const: ispif
69      - const: vfe0
70      - const: vfe1
71
72  iommus:
73    maxItems: 1
74
75  power-domains:
76    items:
77      - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
78      - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
79
80  power-domain-names:
81    items:
82      - const: vfe0
83      - const: vfe1
84
85  ports:
86    $ref: /schemas/graph.yaml#/properties/ports
87
88    description:
89      CSI input ports.
90
91    properties:
92      port@0:
93        $ref: /schemas/graph.yaml#/$defs/port-base
94        unevaluatedProperties: false
95        description:
96          Input port for receiving CSI data.
97
98        properties:
99          endpoint:
100            $ref: video-interfaces.yaml#
101            unevaluatedProperties: false
102
103            properties:
104              data-lanes:
105                description:
106                  An array of physical data lanes indexes.
107                  Position of an entry determines the logical
108                  lane number, while the value of an entry
109                  indicates physical lane index. Lane swapping
110                  is supported. Physical lane indexes;
111                  0, 2, 3, 4.
112                minItems: 1
113                maxItems: 4
114
115              bus-type:
116                enum:
117                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
118                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
119
120            required:
121              - data-lanes
122
123      port@1:
124        $ref: /schemas/graph.yaml#/$defs/port-base
125        unevaluatedProperties: false
126        description:
127          Input port for receiving CSI data.
128
129        properties:
130          endpoint:
131            $ref: video-interfaces.yaml#
132            unevaluatedProperties: false
133
134            properties:
135              data-lanes:
136                minItems: 1
137                maxItems: 4
138
139              bus-type:
140                enum:
141                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
142                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
143
144            required:
145              - data-lanes
146
147      port@2:
148        $ref: /schemas/graph.yaml#/$defs/port-base
149        unevaluatedProperties: false
150        description:
151          Input port for receiving CSI data.
152
153        properties:
154          endpoint:
155            $ref: video-interfaces.yaml#
156            unevaluatedProperties: false
157
158            properties:
159              data-lanes:
160                minItems: 1
161                maxItems: 4
162
163              bus-type:
164                enum:
165                  - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
166                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
167
168            required:
169              - data-lanes
170
171  reg:
172    minItems: 13
173    maxItems: 13
174
175  reg-names:
176    items:
177      - const: csi_clk_mux
178      - const: csid0
179      - const: csid1
180      - const: csid2
181      - const: csiphy0
182      - const: csiphy0_clk_mux
183      - const: csiphy1
184      - const: csiphy1_clk_mux
185      - const: csiphy2
186      - const: csiphy2_clk_mux
187      - const: ispif
188      - const: vfe0
189      - const: vfe1
190
191  vdda-supply:
192    description:
193      Definition of the regulator used as analog power supply.
194
195required:
196  - compatible
197  - reg
198  - reg-names
199  - clocks
200  - clock-names
201  - interrupts
202  - interrupt-names
203  - iommus
204  - power-domains
205  - power-domain-names
206  - vdda-supply
207
208additionalProperties: false
209
210examples:
211  - |
212    #include <dt-bindings/interrupt-controller/arm-gic.h>
213    #include <dt-bindings/clock/qcom,gcc-msm8953.h>
214
215    camss: camss@1b00020 {
216        compatible = "qcom,msm8953-camss";
217
218        reg = <0x1b00020 0x10>,
219              <0x1b30000 0x100>,
220              <0x1b30400 0x100>,
221              <0x1b30800 0x100>,
222              <0x1b34000 0x1000>,
223              <0x1b00030 0x4>,
224              <0x1b35000 0x1000>,
225              <0x1b00038 0x4>,
226              <0x1b36000 0x1000>,
227              <0x1b00040 0x4>,
228              <0x1b31000 0x500>,
229              <0x1b10000 0x1000>,
230              <0x1b14000 0x1000>;
231        reg-names = "csi_clk_mux",
232                    "csid0",
233                    "csid1",
234                    "csid2",
235                    "csiphy0",
236                    "csiphy0_clk_mux",
237                    "csiphy1",
238                    "csiphy1_clk_mux",
239                    "csiphy2",
240                    "csiphy2_clk_mux",
241                    "ispif",
242                    "vfe0",
243                    "vfe1";
244
245        clocks = <&gcc GCC_CAMSS_AHB_CLK>,
246                 <&gcc GCC_CAMSS_CSI0_CLK>,
247                 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
248                 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
249                 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
250                 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
251                 <&gcc GCC_CAMSS_CSI1_CLK>,
252                 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
253                 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
254                 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
255                 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
256                 <&gcc GCC_CAMSS_CSI2_CLK>,
257                 <&gcc GCC_CAMSS_CSI2_AHB_CLK>,
258                 <&gcc GCC_CAMSS_CSI2PHY_CLK>,
259                 <&gcc GCC_CAMSS_CSI2PIX_CLK>,
260                 <&gcc GCC_CAMSS_CSI2RDI_CLK>,
261                 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
262                 <&gcc GCC_CAMSS_CSI_VFE1_CLK>,
263                 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
264                 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
265                 <&gcc GCC_CAMSS_CSI2PHYTIMER_CLK>,
266                 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
267                 <&gcc GCC_CAMSS_MICRO_AHB_CLK>,
268                 <&gcc GCC_CAMSS_TOP_AHB_CLK>,
269                 <&gcc GCC_CAMSS_VFE0_CLK>,
270                 <&gcc GCC_CAMSS_VFE0_AHB_CLK>,
271                 <&gcc GCC_CAMSS_VFE0_AXI_CLK>,
272                 <&gcc GCC_CAMSS_VFE1_CLK>,
273                 <&gcc GCC_CAMSS_VFE1_AHB_CLK>,
274                 <&gcc GCC_CAMSS_VFE1_AXI_CLK>;
275        clock-names = "ahb",
276                      "csi0",
277                      "csi0_ahb",
278                      "csi0_phy",
279                      "csi0_pix",
280                      "csi0_rdi",
281                      "csi1",
282                      "csi1_ahb",
283                      "csi1_phy",
284                      "csi1_pix",
285                      "csi1_rdi",
286                      "csi2",
287                      "csi2_ahb",
288                      "csi2_phy",
289                      "csi2_pix",
290                      "csi2_rdi",
291                      "csi_vfe0",
292                      "csi_vfe1",
293                      "csiphy0_timer",
294                      "csiphy1_timer",
295                      "csiphy2_timer",
296                      "ispif_ahb",
297                      "micro_ahb",
298                      "top_ahb",
299                      "vfe0",
300                      "vfe0_ahb",
301                      "vfe0_axi",
302                      "vfe1",
303                      "vfe1_ahb",
304                      "vfe1_axi";
305
306        interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
307                     <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
308                     <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>,
309                     <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
310                     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
311                     <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>,
312                     <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
313                     <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>,
314                     <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>;
315        interrupt-names = "csid0",
316                          "csid1",
317                          "csid2",
318                          "csiphy0",
319                          "csiphy1",
320                          "csiphy2",
321                          "ispif",
322                          "vfe0",
323                          "vfe1";
324
325        iommus = <&apps_iommu 0x14>;
326
327        power-domains = <&gcc VFE0_GDSC>,
328                        <&gcc VFE1_GDSC>;
329        power-domain-names = "vfe0", "vfe1";
330
331        vdda-supply = <&reg_2v8>;
332
333        ports {
334            #address-cells = <1>;
335            #size-cells = <0>;
336        };
337    };
338