1*2f1ff4e1SVincent Knecht# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*2f1ff4e1SVincent Knecht%YAML 1.2 3*2f1ff4e1SVincent Knecht--- 4*2f1ff4e1SVincent Knecht$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml# 5*2f1ff4e1SVincent Knecht$schema: http://devicetree.org/meta-schemas/core.yaml# 6*2f1ff4e1SVincent Knecht 7*2f1ff4e1SVincent Knechttitle: Qualcomm MSM8939 Camera Subsystem (CAMSS) 8*2f1ff4e1SVincent Knecht 9*2f1ff4e1SVincent Knechtmaintainers: 10*2f1ff4e1SVincent Knecht - Vincent Knecht <vincent.knecht@mailoo.org> 11*2f1ff4e1SVincent Knecht 12*2f1ff4e1SVincent Knechtdescription: 13*2f1ff4e1SVincent Knecht The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms 14*2f1ff4e1SVincent Knecht 15*2f1ff4e1SVincent Knechtproperties: 16*2f1ff4e1SVincent Knecht compatible: 17*2f1ff4e1SVincent Knecht const: qcom,msm8939-camss 18*2f1ff4e1SVincent Knecht 19*2f1ff4e1SVincent Knecht reg: 20*2f1ff4e1SVincent Knecht maxItems: 11 21*2f1ff4e1SVincent Knecht 22*2f1ff4e1SVincent Knecht reg-names: 23*2f1ff4e1SVincent Knecht items: 24*2f1ff4e1SVincent Knecht - const: csiphy0 25*2f1ff4e1SVincent Knecht - const: csiphy0_clk_mux 26*2f1ff4e1SVincent Knecht - const: csiphy1 27*2f1ff4e1SVincent Knecht - const: csiphy1_clk_mux 28*2f1ff4e1SVincent Knecht - const: csid0 29*2f1ff4e1SVincent Knecht - const: csid1 30*2f1ff4e1SVincent Knecht - const: ispif 31*2f1ff4e1SVincent Knecht - const: csi_clk_mux 32*2f1ff4e1SVincent Knecht - const: vfe0 33*2f1ff4e1SVincent Knecht - const: csid2 34*2f1ff4e1SVincent Knecht - const: vfe0_vbif 35*2f1ff4e1SVincent Knecht 36*2f1ff4e1SVincent Knecht clocks: 37*2f1ff4e1SVincent Knecht maxItems: 24 38*2f1ff4e1SVincent Knecht 39*2f1ff4e1SVincent Knecht clock-names: 40*2f1ff4e1SVincent Knecht items: 41*2f1ff4e1SVincent Knecht - const: top_ahb 42*2f1ff4e1SVincent Knecht - const: ispif_ahb 43*2f1ff4e1SVincent Knecht - const: csiphy0_timer 44*2f1ff4e1SVincent Knecht - const: csiphy1_timer 45*2f1ff4e1SVincent Knecht - const: csi0_ahb 46*2f1ff4e1SVincent Knecht - const: csi0 47*2f1ff4e1SVincent Knecht - const: csi0_phy 48*2f1ff4e1SVincent Knecht - const: csi0_pix 49*2f1ff4e1SVincent Knecht - const: csi0_rdi 50*2f1ff4e1SVincent Knecht - const: csi1_ahb 51*2f1ff4e1SVincent Knecht - const: csi1 52*2f1ff4e1SVincent Knecht - const: csi1_phy 53*2f1ff4e1SVincent Knecht - const: csi1_pix 54*2f1ff4e1SVincent Knecht - const: csi1_rdi 55*2f1ff4e1SVincent Knecht - const: ahb 56*2f1ff4e1SVincent Knecht - const: vfe0 57*2f1ff4e1SVincent Knecht - const: csi_vfe0 58*2f1ff4e1SVincent Knecht - const: vfe_ahb 59*2f1ff4e1SVincent Knecht - const: vfe_axi 60*2f1ff4e1SVincent Knecht - const: csi2_ahb 61*2f1ff4e1SVincent Knecht - const: csi2 62*2f1ff4e1SVincent Knecht - const: csi2_phy 63*2f1ff4e1SVincent Knecht - const: csi2_pix 64*2f1ff4e1SVincent Knecht - const: csi2_rdi 65*2f1ff4e1SVincent Knecht 66*2f1ff4e1SVincent Knecht interrupts: 67*2f1ff4e1SVincent Knecht maxItems: 7 68*2f1ff4e1SVincent Knecht 69*2f1ff4e1SVincent Knecht interrupt-names: 70*2f1ff4e1SVincent Knecht items: 71*2f1ff4e1SVincent Knecht - const: csiphy0 72*2f1ff4e1SVincent Knecht - const: csiphy1 73*2f1ff4e1SVincent Knecht - const: csid0 74*2f1ff4e1SVincent Knecht - const: csid1 75*2f1ff4e1SVincent Knecht - const: ispif 76*2f1ff4e1SVincent Knecht - const: vfe0 77*2f1ff4e1SVincent Knecht - const: csid2 78*2f1ff4e1SVincent Knecht 79*2f1ff4e1SVincent Knecht iommus: 80*2f1ff4e1SVincent Knecht maxItems: 1 81*2f1ff4e1SVincent Knecht 82*2f1ff4e1SVincent Knecht power-domains: 83*2f1ff4e1SVincent Knecht items: 84*2f1ff4e1SVincent Knecht - description: VFE GDSC - Video Front End, Global Distributed Switch 85*2f1ff4e1SVincent Knecht Controller. 86*2f1ff4e1SVincent Knecht 87*2f1ff4e1SVincent Knecht vdda-supply: 88*2f1ff4e1SVincent Knecht description: 89*2f1ff4e1SVincent Knecht Definition of the regulator used as 1.2V analog power supply. 90*2f1ff4e1SVincent Knecht 91*2f1ff4e1SVincent Knecht ports: 92*2f1ff4e1SVincent Knecht $ref: /schemas/graph.yaml#/properties/ports 93*2f1ff4e1SVincent Knecht 94*2f1ff4e1SVincent Knecht description: 95*2f1ff4e1SVincent Knecht CSI input ports. 96*2f1ff4e1SVincent Knecht 97*2f1ff4e1SVincent Knecht patternProperties: 98*2f1ff4e1SVincent Knecht "^port@[0-1]$": 99*2f1ff4e1SVincent Knecht $ref: /schemas/graph.yaml#/$defs/port-base 100*2f1ff4e1SVincent Knecht unevaluatedProperties: false 101*2f1ff4e1SVincent Knecht 102*2f1ff4e1SVincent Knecht description: 103*2f1ff4e1SVincent Knecht Input port for receiving CSI data. 104*2f1ff4e1SVincent Knecht 105*2f1ff4e1SVincent Knecht properties: 106*2f1ff4e1SVincent Knecht endpoint: 107*2f1ff4e1SVincent Knecht $ref: video-interfaces.yaml# 108*2f1ff4e1SVincent Knecht unevaluatedProperties: false 109*2f1ff4e1SVincent Knecht 110*2f1ff4e1SVincent Knecht properties: 111*2f1ff4e1SVincent Knecht data-lanes: 112*2f1ff4e1SVincent Knecht minItems: 1 113*2f1ff4e1SVincent Knecht maxItems: 4 114*2f1ff4e1SVincent Knecht 115*2f1ff4e1SVincent Knecht bus-type: 116*2f1ff4e1SVincent Knecht enum: 117*2f1ff4e1SVincent Knecht - 4 # MEDIA_BUS_TYPE_CSI2_DPHY 118*2f1ff4e1SVincent Knecht 119*2f1ff4e1SVincent Knecht required: 120*2f1ff4e1SVincent Knecht - data-lanes 121*2f1ff4e1SVincent Knecht 122*2f1ff4e1SVincent Knechtrequired: 123*2f1ff4e1SVincent Knecht - compatible 124*2f1ff4e1SVincent Knecht - reg 125*2f1ff4e1SVincent Knecht - reg-names 126*2f1ff4e1SVincent Knecht - clocks 127*2f1ff4e1SVincent Knecht - clock-names 128*2f1ff4e1SVincent Knecht - interrupts 129*2f1ff4e1SVincent Knecht - interrupt-names 130*2f1ff4e1SVincent Knecht - iommus 131*2f1ff4e1SVincent Knecht - power-domains 132*2f1ff4e1SVincent Knecht - vdda-supply 133*2f1ff4e1SVincent Knecht - ports 134*2f1ff4e1SVincent Knecht 135*2f1ff4e1SVincent KnechtadditionalProperties: false 136*2f1ff4e1SVincent Knecht 137*2f1ff4e1SVincent Knechtexamples: 138*2f1ff4e1SVincent Knecht - | 139*2f1ff4e1SVincent Knecht #include <dt-bindings/interrupt-controller/arm-gic.h> 140*2f1ff4e1SVincent Knecht #include <dt-bindings/clock/qcom,gcc-msm8939.h> 141*2f1ff4e1SVincent Knecht 142*2f1ff4e1SVincent Knecht isp@1b0ac00 { 143*2f1ff4e1SVincent Knecht compatible = "qcom,msm8939-camss"; 144*2f1ff4e1SVincent Knecht 145*2f1ff4e1SVincent Knecht reg = <0x01b0ac00 0x200>, 146*2f1ff4e1SVincent Knecht <0x01b00030 0x4>, 147*2f1ff4e1SVincent Knecht <0x01b0b000 0x200>, 148*2f1ff4e1SVincent Knecht <0x01b00038 0x4>, 149*2f1ff4e1SVincent Knecht <0x01b08000 0x100>, 150*2f1ff4e1SVincent Knecht <0x01b08400 0x100>, 151*2f1ff4e1SVincent Knecht <0x01b0a000 0x500>, 152*2f1ff4e1SVincent Knecht <0x01b00020 0x10>, 153*2f1ff4e1SVincent Knecht <0x01b10000 0x1000>, 154*2f1ff4e1SVincent Knecht <0x01b08800 0x100>, 155*2f1ff4e1SVincent Knecht <0x01b40000 0x200>; 156*2f1ff4e1SVincent Knecht 157*2f1ff4e1SVincent Knecht reg-names = "csiphy0", 158*2f1ff4e1SVincent Knecht "csiphy0_clk_mux", 159*2f1ff4e1SVincent Knecht "csiphy1", 160*2f1ff4e1SVincent Knecht "csiphy1_clk_mux", 161*2f1ff4e1SVincent Knecht "csid0", 162*2f1ff4e1SVincent Knecht "csid1", 163*2f1ff4e1SVincent Knecht "ispif", 164*2f1ff4e1SVincent Knecht "csi_clk_mux", 165*2f1ff4e1SVincent Knecht "vfe0", 166*2f1ff4e1SVincent Knecht "csid2", 167*2f1ff4e1SVincent Knecht "vfe0_vbif"; 168*2f1ff4e1SVincent Knecht 169*2f1ff4e1SVincent Knecht clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, 170*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, 171*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, 172*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, 173*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0_AHB_CLK>, 174*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0_CLK>, 175*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0PHY_CLK>, 176*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0PIX_CLK>, 177*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI0RDI_CLK>, 178*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1_AHB_CLK>, 179*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1_CLK>, 180*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1PHY_CLK>, 181*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1PIX_CLK>, 182*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI1RDI_CLK>, 183*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_AHB_CLK>, 184*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_VFE0_CLK>, 185*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI_VFE0_CLK>, 186*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_VFE_AHB_CLK>, 187*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_VFE_AXI_CLK>, 188*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI2_AHB_CLK>, 189*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI2_CLK>, 190*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI2PHY_CLK>, 191*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI2PIX_CLK>, 192*2f1ff4e1SVincent Knecht <&gcc GCC_CAMSS_CSI2RDI_CLK>; 193*2f1ff4e1SVincent Knecht 194*2f1ff4e1SVincent Knecht clock-names = "top_ahb", 195*2f1ff4e1SVincent Knecht "ispif_ahb", 196*2f1ff4e1SVincent Knecht "csiphy0_timer", 197*2f1ff4e1SVincent Knecht "csiphy1_timer", 198*2f1ff4e1SVincent Knecht "csi0_ahb", 199*2f1ff4e1SVincent Knecht "csi0", 200*2f1ff4e1SVincent Knecht "csi0_phy", 201*2f1ff4e1SVincent Knecht "csi0_pix", 202*2f1ff4e1SVincent Knecht "csi0_rdi", 203*2f1ff4e1SVincent Knecht "csi1_ahb", 204*2f1ff4e1SVincent Knecht "csi1", 205*2f1ff4e1SVincent Knecht "csi1_phy", 206*2f1ff4e1SVincent Knecht "csi1_pix", 207*2f1ff4e1SVincent Knecht "csi1_rdi", 208*2f1ff4e1SVincent Knecht "ahb", 209*2f1ff4e1SVincent Knecht "vfe0", 210*2f1ff4e1SVincent Knecht "csi_vfe0", 211*2f1ff4e1SVincent Knecht "vfe_ahb", 212*2f1ff4e1SVincent Knecht "vfe_axi", 213*2f1ff4e1SVincent Knecht "csi2_ahb", 214*2f1ff4e1SVincent Knecht "csi2", 215*2f1ff4e1SVincent Knecht "csi2_phy", 216*2f1ff4e1SVincent Knecht "csi2_pix", 217*2f1ff4e1SVincent Knecht "csi2_rdi"; 218*2f1ff4e1SVincent Knecht 219*2f1ff4e1SVincent Knecht interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>, 220*2f1ff4e1SVincent Knecht <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>, 221*2f1ff4e1SVincent Knecht <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>, 222*2f1ff4e1SVincent Knecht <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>, 223*2f1ff4e1SVincent Knecht <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>, 224*2f1ff4e1SVincent Knecht <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>, 225*2f1ff4e1SVincent Knecht <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>; 226*2f1ff4e1SVincent Knecht 227*2f1ff4e1SVincent Knecht interrupt-names = "csiphy0", 228*2f1ff4e1SVincent Knecht "csiphy1", 229*2f1ff4e1SVincent Knecht "csid0", 230*2f1ff4e1SVincent Knecht "csid1", 231*2f1ff4e1SVincent Knecht "ispif", 232*2f1ff4e1SVincent Knecht "vfe0", 233*2f1ff4e1SVincent Knecht "csid2"; 234*2f1ff4e1SVincent Knecht 235*2f1ff4e1SVincent Knecht iommus = <&apps_iommu 3>; 236*2f1ff4e1SVincent Knecht 237*2f1ff4e1SVincent Knecht power-domains = <&gcc VFE_GDSC>; 238*2f1ff4e1SVincent Knecht 239*2f1ff4e1SVincent Knecht vdda-supply = <®_1v2>; 240*2f1ff4e1SVincent Knecht 241*2f1ff4e1SVincent Knecht ports { 242*2f1ff4e1SVincent Knecht #address-cells = <1>; 243*2f1ff4e1SVincent Knecht #size-cells = <0>; 244*2f1ff4e1SVincent Knecht 245*2f1ff4e1SVincent Knecht port@1 { 246*2f1ff4e1SVincent Knecht reg = <1>; 247*2f1ff4e1SVincent Knecht 248*2f1ff4e1SVincent Knecht csiphy1_ep: endpoint { 249*2f1ff4e1SVincent Knecht data-lanes = <0 2>; 250*2f1ff4e1SVincent Knecht remote-endpoint = <&sensor_ep>; 251*2f1ff4e1SVincent Knecht }; 252*2f1ff4e1SVincent Knecht }; 253*2f1ff4e1SVincent Knecht }; 254*2f1ff4e1SVincent Knecht }; 255