xref: /linux/Documentation/devicetree/bindings/media/qcom,msm8939-camss.yaml (revision 84318277d6334c6981ab326d4acc87c6a6ddc9b8) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,msm8939-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm MSM8939 Camera Subsystem (CAMSS)
8
9maintainers:
10  - Vincent Knecht <vincent.knecht@mailoo.org>
11
12description:
13  The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
14
15properties:
16  compatible:
17    const: qcom,msm8939-camss
18
19  reg:
20    maxItems: 11
21
22  reg-names:
23    items:
24      - const: csiphy0
25      - const: csiphy0_clk_mux
26      - const: csiphy1
27      - const: csiphy1_clk_mux
28      - const: csid0
29      - const: csid1
30      - const: ispif
31      - const: csi_clk_mux
32      - const: vfe0
33      - const: csid2
34      - const: vfe0_vbif
35
36  clocks:
37    maxItems: 24
38
39  clock-names:
40    items:
41      - const: top_ahb
42      - const: ispif_ahb
43      - const: csiphy0_timer
44      - const: csiphy1_timer
45      - const: csi0_ahb
46      - const: csi0
47      - const: csi0_phy
48      - const: csi0_pix
49      - const: csi0_rdi
50      - const: csi1_ahb
51      - const: csi1
52      - const: csi1_phy
53      - const: csi1_pix
54      - const: csi1_rdi
55      - const: ahb
56      - const: vfe0
57      - const: csi_vfe0
58      - const: vfe_ahb
59      - const: vfe_axi
60      - const: csi2_ahb
61      - const: csi2
62      - const: csi2_phy
63      - const: csi2_pix
64      - const: csi2_rdi
65
66  interrupts:
67    maxItems: 7
68
69  interrupt-names:
70    items:
71      - const: csiphy0
72      - const: csiphy1
73      - const: csid0
74      - const: csid1
75      - const: ispif
76      - const: vfe0
77      - const: csid2
78
79  iommus:
80    maxItems: 1
81
82  power-domains:
83    items:
84      - description: VFE GDSC - Video Front End, Global Distributed Switch
85          Controller.
86
87  vdda-supply:
88    description:
89      Definition of the regulator used as 1.2V analog power supply.
90
91  ports:
92    $ref: /schemas/graph.yaml#/properties/ports
93
94    description:
95      CSI input ports.
96
97    patternProperties:
98      "^port@[0-1]$":
99        $ref: /schemas/graph.yaml#/$defs/port-base
100        unevaluatedProperties: false
101
102        description:
103          Input port for receiving CSI data.
104
105        properties:
106          endpoint:
107            $ref: video-interfaces.yaml#
108            unevaluatedProperties: false
109
110            properties:
111              data-lanes:
112                minItems: 1
113                maxItems: 4
114
115              bus-type:
116                enum:
117                  - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
118
119            required:
120              - data-lanes
121
122required:
123  - compatible
124  - reg
125  - reg-names
126  - clocks
127  - clock-names
128  - interrupts
129  - interrupt-names
130  - iommus
131  - power-domains
132  - vdda-supply
133  - ports
134
135additionalProperties: false
136
137examples:
138  - |
139    #include <dt-bindings/interrupt-controller/arm-gic.h>
140    #include <dt-bindings/clock/qcom,gcc-msm8939.h>
141
142    isp@1b0ac00 {
143        compatible = "qcom,msm8939-camss";
144
145        reg = <0x01b0ac00 0x200>,
146              <0x01b00030 0x4>,
147              <0x01b0b000 0x200>,
148              <0x01b00038 0x4>,
149              <0x01b08000 0x100>,
150              <0x01b08400 0x100>,
151              <0x01b0a000 0x500>,
152              <0x01b00020 0x10>,
153              <0x01b10000 0x1000>,
154              <0x01b08800 0x100>,
155              <0x01b40000 0x200>;
156
157        reg-names = "csiphy0",
158                    "csiphy0_clk_mux",
159                    "csiphy1",
160                    "csiphy1_clk_mux",
161                    "csid0",
162                    "csid1",
163                    "ispif",
164                    "csi_clk_mux",
165                    "vfe0",
166                    "csid2",
167                    "vfe0_vbif";
168
169        clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>,
170                 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>,
171                 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>,
172                 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>,
173                 <&gcc GCC_CAMSS_CSI0_AHB_CLK>,
174                 <&gcc GCC_CAMSS_CSI0_CLK>,
175                 <&gcc GCC_CAMSS_CSI0PHY_CLK>,
176                 <&gcc GCC_CAMSS_CSI0PIX_CLK>,
177                 <&gcc GCC_CAMSS_CSI0RDI_CLK>,
178                 <&gcc GCC_CAMSS_CSI1_AHB_CLK>,
179                 <&gcc GCC_CAMSS_CSI1_CLK>,
180                 <&gcc GCC_CAMSS_CSI1PHY_CLK>,
181                 <&gcc GCC_CAMSS_CSI1PIX_CLK>,
182                 <&gcc GCC_CAMSS_CSI1RDI_CLK>,
183                 <&gcc GCC_CAMSS_AHB_CLK>,
184                 <&gcc GCC_CAMSS_VFE0_CLK>,
185                 <&gcc GCC_CAMSS_CSI_VFE0_CLK>,
186                 <&gcc GCC_CAMSS_VFE_AHB_CLK>,
187                 <&gcc GCC_CAMSS_VFE_AXI_CLK>,
188                 <&gcc GCC_CAMSS_CSI2_AHB_CLK>,
189                 <&gcc GCC_CAMSS_CSI2_CLK>,
190                 <&gcc GCC_CAMSS_CSI2PHY_CLK>,
191                 <&gcc GCC_CAMSS_CSI2PIX_CLK>,
192                 <&gcc GCC_CAMSS_CSI2RDI_CLK>;
193
194        clock-names = "top_ahb",
195                      "ispif_ahb",
196                      "csiphy0_timer",
197                      "csiphy1_timer",
198                      "csi0_ahb",
199                      "csi0",
200                      "csi0_phy",
201                      "csi0_pix",
202                      "csi0_rdi",
203                      "csi1_ahb",
204                      "csi1",
205                      "csi1_phy",
206                      "csi1_pix",
207                      "csi1_rdi",
208                      "ahb",
209                      "vfe0",
210                      "csi_vfe0",
211                      "vfe_ahb",
212                      "vfe_axi",
213                      "csi2_ahb",
214                      "csi2",
215                      "csi2_phy",
216                      "csi2_pix",
217                      "csi2_rdi";
218
219        interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
220                     <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
221                     <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>,
222                     <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>,
223                     <GIC_SPI 55 IRQ_TYPE_EDGE_RISING>,
224                     <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>,
225                     <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
226
227        interrupt-names = "csiphy0",
228                          "csiphy1",
229                          "csid0",
230                          "csid1",
231                          "ispif",
232                          "vfe0",
233                          "csid2";
234
235        iommus = <&apps_iommu 3>;
236
237        power-domains = <&gcc VFE_GDSC>;
238
239        vdda-supply = <&reg_1v2>;
240
241        ports {
242            #address-cells = <1>;
243            #size-cells = <0>;
244
245            port@1 {
246                reg = <1>;
247
248                csiphy1_ep: endpoint {
249                    data-lanes = <0 2>;
250                    remote-endpoint = <&sensor_ep>;
251                };
252            };
253        };
254    };
255