1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SM6150 Camera Subsystem (CAMSS) 8 9maintainers: 10 - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com> 11 12description: 13 This binding describes the camera subsystem hardware found on SM6150 14 Qualcomm SoCs. It includes submodules such as CSIPHY (CSI Physical layer) 15 and CSID (CSI Decoder), which comply with the MIPI CSI2 protocol. 16 17 The subsystem also integrates a set of real-time image processing engines 18 and their associated configuration modules, as well as non-real-time engines. 19 20properties: 21 compatible: 22 const: qcom,sm6150-camss 23 24 reg: 25 items: 26 - description: Registers for CSID 0 27 - description: Registers for CSID 1 28 - description: Registers for CSID Lite 29 - description: Registers for CSIPHY 0 30 - description: Registers for CSIPHY 1 31 - description: Registers for CSIPHY 2 32 - description: Registers for VFE 0 33 - description: Registers for VFE 1 34 - description: Registers for VFE Lite 35 - description: Registers for BPS (Bayer Processing Segment) 36 - description: Registers for CAMNOC 37 - description: Registers for CPAS CDM 38 - description: Registers for CPAS TOP 39 - description: Registers for ICP (Imaging Control Processor) CSR (Control and Status Registers) 40 - description: Registers for ICP QGIC (Qualcomm Generic Interrupt Controller) 41 - description: Registers for ICP SIERRA ((A5 subsystem communication)) 42 - description: Registers for IPE (Image Postprocessing Engine) 0 43 - description: Registers for JPEG DMA 44 - description: Registers for JPEG ENC 45 - description: Registers for LRME (Low Resolution Motion Estimation) 46 47 reg-names: 48 items: 49 - const: csid0 50 - const: csid1 51 - const: csid_lite 52 - const: csiphy0 53 - const: csiphy1 54 - const: csiphy2 55 - const: vfe0 56 - const: vfe1 57 - const: vfe_lite 58 - const: bps 59 - const: camnoc 60 - const: cpas_cdm 61 - const: cpas_top 62 - const: icp_csr 63 - const: icp_qgic 64 - const: icp_sierra 65 - const: ipe0 66 - const: jpeg_dma 67 - const: jpeg_enc 68 - const: lrme 69 70 clocks: 71 maxItems: 33 72 73 clock-names: 74 items: 75 - const: gcc_ahb 76 - const: gcc_axi_hf 77 - const: camnoc_axi 78 - const: cpas_ahb 79 - const: csiphy0 80 - const: csiphy0_timer 81 - const: csiphy1 82 - const: csiphy1_timer 83 - const: csiphy2 84 - const: csiphy2_timer 85 - const: soc_ahb 86 - const: vfe0 87 - const: vfe0_axi 88 - const: vfe0_cphy_rx 89 - const: vfe0_csid 90 - const: vfe1 91 - const: vfe1_axi 92 - const: vfe1_cphy_rx 93 - const: vfe1_csid 94 - const: vfe_lite 95 - const: vfe_lite_cphy_rx 96 - const: vfe_lite_csid 97 - const: bps 98 - const: bps_ahb 99 - const: bps_axi 100 - const: bps_areg 101 - const: icp 102 - const: ipe0 103 - const: ipe0_ahb 104 - const: ipe0_areg 105 - const: ipe0_axi 106 - const: jpeg 107 - const: lrme 108 109 interrupts: 110 maxItems: 15 111 112 interrupt-names: 113 items: 114 - const: csid0 115 - const: csid1 116 - const: csid_lite 117 - const: csiphy0 118 - const: csiphy1 119 - const: csiphy2 120 - const: vfe0 121 - const: vfe1 122 - const: vfe_lite 123 - const: camnoc 124 - const: cdm 125 - const: icp 126 - const: jpeg_dma 127 - const: jpeg_enc 128 - const: lrme 129 130 interconnects: 131 maxItems: 4 132 133 interconnect-names: 134 items: 135 - const: ahb 136 - const: hf_0 137 - const: hf_1 138 - const: sf_mnoc 139 140 iommus: 141 items: 142 - description: Camera IFE 0 non-protected stream 143 - description: Camera IFE 1 non-protected stream 144 - description: Camera IFE 3 non-protected stream 145 - description: Camera CDM non-protected stream 146 - description: Camera LRME read non-protected stream 147 - description: Camera IPE 0 read non-protected stream 148 - description: Camera BPS read non-protected stream 149 - description: Camera IPE 0 write non-protected stream 150 - description: Camera BPS write non-protected stream 151 - description: Camera LRME write non-protected stream 152 - description: Camera JPEG read non-protected stream 153 - description: Camera JPEG write non-protected stream 154 - description: Camera ICP stream 155 156 power-domains: 157 items: 158 - description: 159 IFE0 GDSC - Image Front End, Global Distributed Switch Controller. 160 - description: 161 IFE1 GDSC - Image Front End, Global Distributed Switch Controller. 162 - description: 163 Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. 164 - description: 165 Titan BPS - Bayer Processing Segment, Global Distributed Switch Controller. 166 - description: 167 IPE GDSC - Image Postprocessing Engine, Global Distributed Switch Controller. 168 169 power-domain-names: 170 items: 171 - const: ife0 172 - const: ife1 173 - const: top 174 - const: bps 175 - const: ipe 176 177 vdd-csiphy-1p2-supply: 178 description: 179 Phandle to a 1.2V regulator supply to CSI PHYs. 180 181 vdd-csiphy-1p8-supply: 182 description: 183 Phandle to 1.8V regulator supply to CSI PHYs pll block. 184 185 ports: 186 $ref: /schemas/graph.yaml#/properties/ports 187 188 description: 189 CSI input ports. 190 191 patternProperties: 192 "^port@[0-2]$": 193 $ref: /schemas/graph.yaml#/$defs/port-base 194 unevaluatedProperties: false 195 196 description: 197 Input port for receiving CSI data from a CSIPHY. 198 199 properties: 200 endpoint: 201 $ref: video-interfaces.yaml# 202 unevaluatedProperties: false 203 204 properties: 205 data-lanes: 206 minItems: 1 207 maxItems: 4 208 209 required: 210 - data-lanes 211 212required: 213 - compatible 214 - reg 215 - reg-names 216 - clocks 217 - clock-names 218 - interrupts 219 - interrupt-names 220 - interconnects 221 - interconnect-names 222 - iommus 223 - power-domains 224 - power-domain-names 225 226additionalProperties: false 227 228examples: 229 - | 230 #include <dt-bindings/clock/qcom,qcs615-camcc.h> 231 #include <dt-bindings/clock/qcom,qcs615-gcc.h> 232 #include <dt-bindings/clock/qcom,rpmh.h> 233 #include <dt-bindings/interconnect/qcom,icc.h> 234 #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h> 235 #include <dt-bindings/interrupt-controller/arm-gic.h> 236 #include <dt-bindings/power/qcom-rpmpd.h> 237 238 soc { 239 #address-cells = <2>; 240 #size-cells = <2>; 241 242 camss: isp@acb3000 { 243 compatible = "qcom,sm6150-camss"; 244 245 reg = <0x0 0x0acb3000 0x0 0x1000>, 246 <0x0 0x0acba000 0x0 0x1000>, 247 <0x0 0x0acc8000 0x0 0x1000>, 248 <0x0 0x0ac65000 0x0 0x1000>, 249 <0x0 0x0ac66000 0x0 0x1000>, 250 <0x0 0x0ac67000 0x0 0x1000>, 251 <0x0 0x0acaf000 0x0 0x4000>, 252 <0x0 0x0acb6000 0x0 0x4000>, 253 <0x0 0x0acc4000 0x0 0x4000>, 254 <0x0 0x0ac6f000 0x0 0x3000>, 255 <0x0 0x0ac42000 0x0 0x5000>, 256 <0x0 0x0ac48000 0x0 0x1000>, 257 <0x0 0x0ac40000 0x0 0x1000>, 258 <0x0 0x0ac18000 0x0 0x3000>, 259 <0x0 0x0ac00000 0x0 0x6000>, 260 <0x0 0x0ac10000 0x0 0x8000>, 261 <0x0 0x0ac87000 0x0 0x3000>, 262 <0x0 0x0ac52000 0x0 0x4000>, 263 <0x0 0x0ac4e000 0x0 0x4000>, 264 <0x0 0x0ac6b000 0x0 0x0a00>; 265 reg-names = "csid0", 266 "csid1", 267 "csid_lite", 268 "csiphy0", 269 "csiphy1", 270 "csiphy2", 271 "vfe0", 272 "vfe1", 273 "vfe_lite", 274 "bps", 275 "camnoc", 276 "cpas_cdm", 277 "cpas_top", 278 "icp_csr", 279 "icp_qgic", 280 "icp_sierra", 281 "ipe0", 282 "jpeg_dma", 283 "jpeg_enc", 284 "lrme"; 285 286 clocks = <&gcc GCC_CAMERA_AHB_CLK>, 287 <&gcc GCC_CAMERA_HF_AXI_CLK>, 288 <&camcc CAM_CC_CAMNOC_AXI_CLK>, 289 <&camcc CAM_CC_CPAS_AHB_CLK>, 290 <&camcc CAM_CC_CSIPHY0_CLK>, 291 <&camcc CAM_CC_CSI0PHYTIMER_CLK>, 292 <&camcc CAM_CC_CSIPHY1_CLK>, 293 <&camcc CAM_CC_CSI1PHYTIMER_CLK>, 294 <&camcc CAM_CC_CSIPHY2_CLK>, 295 <&camcc CAM_CC_CSI2PHYTIMER_CLK>, 296 <&camcc CAM_CC_SOC_AHB_CLK>, 297 <&camcc CAM_CC_IFE_0_CLK>, 298 <&camcc CAM_CC_IFE_0_AXI_CLK>, 299 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, 300 <&camcc CAM_CC_IFE_0_CSID_CLK>, 301 <&camcc CAM_CC_IFE_1_CLK>, 302 <&camcc CAM_CC_IFE_1_AXI_CLK>, 303 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, 304 <&camcc CAM_CC_IFE_1_CSID_CLK>, 305 <&camcc CAM_CC_IFE_LITE_CLK>, 306 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>, 307 <&camcc CAM_CC_IFE_LITE_CSID_CLK>, 308 <&camcc CAM_CC_BPS_CLK>, 309 <&camcc CAM_CC_BPS_AHB_CLK>, 310 <&camcc CAM_CC_BPS_AXI_CLK>, 311 <&camcc CAM_CC_BPS_AREG_CLK>, 312 <&camcc CAM_CC_ICP_CLK>, 313 <&camcc CAM_CC_IPE_0_CLK>, 314 <&camcc CAM_CC_IPE_0_AHB_CLK>, 315 <&camcc CAM_CC_IPE_0_AREG_CLK>, 316 <&camcc CAM_CC_IPE_0_AXI_CLK>, 317 <&camcc CAM_CC_JPEG_CLK>, 318 <&camcc CAM_CC_LRME_CLK>; 319 320 clock-names = "gcc_ahb", 321 "gcc_axi_hf", 322 "camnoc_axi", 323 "cpas_ahb", 324 "csiphy0", 325 "csiphy0_timer", 326 "csiphy1", 327 "csiphy1_timer", 328 "csiphy2", 329 "csiphy2_timer", 330 "soc_ahb", 331 "vfe0", 332 "vfe0_axi", 333 "vfe0_cphy_rx", 334 "vfe0_csid", 335 "vfe1", 336 "vfe1_axi", 337 "vfe1_cphy_rx", 338 "vfe1_csid", 339 "vfe_lite", 340 "vfe_lite_cphy_rx", 341 "vfe_lite_csid", 342 "bps", 343 "bps_ahb", 344 "bps_axi", 345 "bps_areg", 346 "icp", 347 "ipe0", 348 "ipe0_ahb", 349 "ipe0_areg", 350 "ipe0_axi", 351 "jpeg", 352 "lrme"; 353 354 interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY 355 &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>, 356 <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS 357 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, 358 <&mmss_noc MASTER_CAMNOC_HF1 QCOM_ICC_TAG_ALWAYS 359 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, 360 <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS 361 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; 362 interconnect-names = "ahb", 363 "hf_0", 364 "hf_1", 365 "sf_mnoc"; 366 367 interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>, 368 <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, 369 <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>, 370 <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>, 371 <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>, 372 <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>, 373 <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>, 374 <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>, 375 <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>, 376 <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>, 377 <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>, 378 <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>, 379 <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>, 380 <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>, 381 <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>; 382 interrupt-names = "csid0", 383 "csid1", 384 "csid_lite", 385 "csiphy0", 386 "csiphy1", 387 "csiphy2", 388 "vfe0", 389 "vfe1", 390 "vfe_lite", 391 "camnoc", 392 "cdm", 393 "icp", 394 "jpeg_dma", 395 "jpeg_enc", 396 "lrme"; 397 398 iommus = <&apps_smmu 0x0820 0x40>, 399 <&apps_smmu 0x0840 0x00>, 400 <&apps_smmu 0x0860 0x40>, 401 <&apps_smmu 0x0c00 0x00>, 402 <&apps_smmu 0x0cc0 0x00>, 403 <&apps_smmu 0x0c80 0x00>, 404 <&apps_smmu 0x0ca0 0x00>, 405 <&apps_smmu 0x0d00 0x00>, 406 <&apps_smmu 0x0d20 0x00>, 407 <&apps_smmu 0x0d40 0x00>, 408 <&apps_smmu 0x0d80 0x20>, 409 <&apps_smmu 0x0da0 0x20>, 410 <&apps_smmu 0x0de2 0x00>; 411 412 power-domains = <&camcc IFE_0_GDSC>, 413 <&camcc IFE_1_GDSC>, 414 <&camcc TITAN_TOP_GDSC>, 415 <&camcc BPS_GDSC>, 416 <&camcc IPE_0_GDSC>; 417 power-domain-names = "ife0", 418 "ife1", 419 "top", 420 "bps", 421 "ipe"; 422 423 vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>; 424 vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>; 425 426 ports { 427 #address-cells = <1>; 428 #size-cells = <0>; 429 430 port@0 { 431 reg = <0>; 432 csiphy_ep0: endpoint { 433 data-lanes = <0 1>; 434 remote-endpoint = <&sensor_ep>; 435 }; 436 }; 437 }; 438 }; 439 }; 440