xref: /linux/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml (revision 4f2c0a4acffbec01079c28f839422e64ddeff004) 
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Video Engine
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13properties:
14  compatible:
15    enum:
16      - allwinner,sun4i-a10-video-engine
17      - allwinner,sun5i-a13-video-engine
18      - allwinner,sun7i-a20-video-engine
19      - allwinner,sun8i-a33-video-engine
20      - allwinner,sun8i-h3-video-engine
21      - allwinner,sun8i-v3s-video-engine
22      - allwinner,sun8i-r40-video-engine
23      - allwinner,sun20i-d1-video-engine
24      - allwinner,sun50i-a64-video-engine
25      - allwinner,sun50i-h5-video-engine
26      - allwinner,sun50i-h6-video-engine
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  clocks:
35    items:
36      - description: Bus Clock
37      - description: Module Clock
38      - description: RAM Clock
39
40  clock-names:
41    items:
42      - const: ahb
43      - const: mod
44      - const: ram
45
46  resets:
47    maxItems: 1
48
49  allwinner,sram:
50    $ref: /schemas/types.yaml#/definitions/phandle-array
51    items:
52      - items:
53          - description: phandle to SRAM
54          - description: register value for device
55    description: Phandle to the device SRAM
56
57  iommus:
58    maxItems: 1
59
60  memory-region:
61    maxItems: 1
62    description:
63      CMA pool to use for buffers allocation instead of the default
64      CMA pool.
65
66required:
67  - compatible
68  - reg
69  - interrupts
70  - clocks
71  - clock-names
72  - resets
73  - allwinner,sram
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80    #include <dt-bindings/clock/sun7i-a20-ccu.h>
81    #include <dt-bindings/reset/sun4i-a10-ccu.h>
82
83    video-codec@1c0e000 {
84        compatible = "allwinner,sun7i-a20-video-engine";
85        reg = <0x01c0e000 0x1000>;
86        interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
87        clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
88                 <&ccu CLK_DRAM_VE>;
89        clock-names = "ahb", "mod", "ram";
90        resets = <&ccu RST_VE>;
91        allwinner,sram = <&ve_sram 1>;
92    };
93
94...
95