xref: /linux/Documentation/devicetree/bindings/mailbox/axiado,ax3005-mailbox.yaml (revision 8bfab832ad6905ba70e69bad87a78f6d90cce64a) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/axiado,ax3005-mailbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Axiado AX3005 Mailbox Controller
8
9maintainers:
10  - Krishnakumar Kesavan <kkesavan@axiado.com>
11  - Prasad Bolisetty <pbolisetty@axiado.com>
12  - Swark Yang <syang@axiado.com>
13
14description:
15  The Axiado mailbox controller provides inter-processor communication
16  channels between subsystems within the Axiado SoC. The hardware has
17  separate TX and RX register regions. Only the RX channels (channels 8-15)
18  generate interrupts; TX channels are purely poll/write-based.
19
20properties:
21  compatible:
22    const: axiado,ax3005-mailbox
23
24  reg:
25    items:
26      - description: TX mailbox register region
27      - description: RX mailbox register region
28
29  reg-names:
30    items:
31      - const: tx
32      - const: rx
33
34  interrupts:
35    description:
36      One interrupt per RX channel. The hardware exposes eight RX interrupt
37      lines corresponding to channels 8 through 15.
38    maxItems: 8
39
40  interrupt-names:
41    description:
42      Named interrupt lines for each RX channel, from ch8 to ch15.
43    items:
44      - const: ch8
45      - const: ch9
46      - const: ch10
47      - const: ch11
48      - const: ch12
49      - const: ch13
50      - const: ch14
51      - const: ch15
52
53  "#mbox-cells":
54    description:
55      Number of cells in a mailbox specifier. A single cell encodes the
56      channel index as seen by the client.
57    const: 1
58
59required:
60  - compatible
61  - reg
62  - reg-names
63  - interrupts
64  - interrupt-names
65  - "#mbox-cells"
66
67additionalProperties: false
68
69examples:
70  - |
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72
73    soc {
74        #address-cells = <2>;
75        #size-cells = <2>;
76
77        mailbox@330f2000 {
78            compatible = "axiado,ax3005-mailbox";
79            reg = <0x0 0x330f2000 0x0 0x2000>,
80                  <0x0 0x331b0000 0x0 0x1000>;
81            reg-names = "tx", "rx";
82            /* Only RX channels (8-15) have IRQs */
83            interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
84                         <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>,
85                         <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
86                         <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
87                         <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>,
88                         <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
89                         <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
90                         <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
91            interrupt-names = "ch8", "ch9", "ch10", "ch11",
92                              "ch12", "ch13", "ch14", "ch15";
93            interrupt-parent = <&gic500>;
94            #mbox-cells = <1>;
95        };
96    };
97