xref: /linux/Documentation/devicetree/bindings/interrupt-controller/ti,irq-crossbar.yaml (revision 0eaed89c18aeedf0898baf2dbf5ff027c6795152) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/ti,irq-crossbar.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments IRQ Crossbar
8
9maintainers:
10  - Sricharan R <r.sricharan@ti.com>
11
12description:
13  Some socs have a large number of interrupts requests to service the needs of
14  its many peripherals and subsystems. All of the interrupt lines from the
15  subsystems are not needed at the same time, so they have to be muxed to the
16  irq-controller appropriately. In such places a interrupt controllers are
17  preceded by an CROSSBAR that provides flexibility in muxing the device
18  requests to the controller inputs.
19
20properties:
21  compatible:
22    const: ti,irq-crossbar
23
24  reg:
25    maxItems: 1
26
27  interrupt-controller: true
28
29  '#interrupt-cells':
30    const: 3
31
32  ti,max-irqs:
33    $ref: /schemas/types.yaml#/definitions/uint32
34    description:
35      Total number of irqs available at the parent interrupt controller.
36    minimum: 1
37
38  ti,max-crossbar-sources:
39    $ref: /schemas/types.yaml#/definitions/uint32
40    description:
41      Maximum number of crossbar sources that can be routed.
42    minimum: 1
43
44  ti,reg-size:
45    $ref: /schemas/types.yaml#/definitions/uint32
46    description:
47      Size of a individual register in bytes. Every individual
48      register is assumed to be of same size.
49    enum: [1, 2, 4]
50
51  ti,irqs-reserved:
52    $ref: /schemas/types.yaml#/definitions/uint32-array
53    description:
54      List of the reserved irq lines that are not muxed using crossbar. These
55      interrupt lines are reserved in the soc, so crossbar bar driver should not
56      consider them as free lines.
57
58  ti,irqs-skip:
59    $ref: /schemas/types.yaml#/definitions/uint32-array
60    description:
61      Similar to "ti,irqs-reserved", but these are for SOC-specific hard-wiring
62      of those irqs which unexpectedly bypasses the crossbar. These irqs have a
63      crossbar register, but still cannot be used.
64
65  ti,irqs-safe-map:
66    $ref: /schemas/types.yaml#/definitions/uint32
67    description:
68      integer which maps to a safe configuration to use when the interrupt
69      controller irq is unused.
70    default: 0
71
72required:
73  - compatible
74  - reg
75  - interrupt-controller
76  - '#interrupt-cells'
77  - ti,max-irqs
78  - ti,max-crossbar-sources
79  - ti,reg-size
80  - ti,irqs-reserved
81
82additionalProperties: false
83
84examples:
85  - |
86    crossbar@4a002a48 {
87        compatible = "ti,irq-crossbar";
88        reg = <0x4a002a48 0x130>;
89        interrupt-controller;
90        #interrupt-cells = <3>;
91        ti,max-irqs = <160>;
92        ti,max-crossbar-sources = <400>;
93        ti,reg-size = <2>;
94        ti,irqs-reserved = <0 1 2 3 5 6 131 132>;
95        ti,irqs-skip = <10 133 139 140>;
96    };
97