1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/riscv,rpmi-system-msi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: RISC-V RPMI system MSI service group based interrupt controller 8 9maintainers: 10 - Anup Patel <anup@brainfault.org> 11 12description: | 13 The RISC-V Platform Management Interface (RPMI) [1] defines a 14 messaging protocol which is modular and extensible. The supervisor 15 software can send/receive RPMI messages via SBI MPXY extension [2] 16 or some dedicated supervisor-mode RPMI transport. 17 18 The RPMI specification [1] defines system MSI service group which 19 allow application processors to receive MSIs upon system events 20 such as P2A doorbell, graceful shutdown/reboot request, CPU hotplug 21 event, memory hotplug event, etc from the platform microcontroller. 22 The supervisor software can access RPMI system MSI service group via 23 SBI MPXY channel or some dedicated supervisor-mode RPMI transport. 24 25 =========================================== 26 References 27 =========================================== 28 29 [1] RISC-V Platform Management Interface (RPMI) v1.0 (or higher) 30 https://github.com/riscv-non-isa/riscv-rpmi/releases 31 32 [2] RISC-V Supervisor Binary Interface (SBI) v3.0 (or higher) 33 https://github.com/riscv-non-isa/riscv-sbi-doc/releases 34 35allOf: 36 - $ref: /schemas/interrupt-controller.yaml# 37 38properties: 39 compatible: 40 description: 41 Intended for use by the supervisor software. 42 const: riscv,rpmi-system-msi 43 44 mboxes: 45 maxItems: 1 46 description: 47 Mailbox channel of the underlying RPMI transport or SBI message proxy channel. 48 49 msi-parent: true 50 51 interrupt-controller: true 52 53 "#interrupt-cells": 54 const: 1 55 56required: 57 - compatible 58 - mboxes 59 - msi-parent 60 - interrupt-controller 61 - "#interrupt-cells" 62 63additionalProperties: false 64 65examples: 66 - | 67 interrupt-controller { 68 compatible = "riscv,rpmi-system-msi"; 69 mboxes = <&mpxy_mbox 0x2000 0x0>; 70 msi-parent = <&imsic_slevel>; 71 interrupt-controller; 72 #interrupt-cells = <1>; 73 }; 74... 75