1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/nvidia,tegra20-ictlr.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra20 Legacy Interrupt Controller 8 9maintainers: 10 - Thierry Reding <treding@nvidia.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 12 13description: > 14 All Tegra SoCs contain a legacy interrupt controller that routes interrupts to 15 the GIC, and also serves as a wakeup source. It is also referred to as 16 "ictlr", hence the name of the binding. 17 18 The HW block exposes a number of interrupt controllers, each implementing a 19 set of 32 interrupts. 20 21 Notes: 22 - Because this HW ultimately routes interrupts to the GIC, the 23 interrupt specifier must be that of the GIC. 24 - Only SPIs can use the ictlr as an interrupt parent. SGIs and PPIs 25 are explicitly forbidden. 26 27properties: 28 compatible: 29 oneOf: 30 - items: 31 - enum: 32 - nvidia,tegra114-ictlr 33 - nvidia,tegra124-ictlr 34 - const: nvidia,tegra30-ictlr 35 - enum: 36 - nvidia,tegra20-ictlr 37 - nvidia,tegra30-ictlr 38 - nvidia,tegra210-ictlr 39 40 reg: 41 description: Each entry is a block of 32 interrupts 42 minItems: 4 43 maxItems: 6 44 45 interrupt-controller: true 46 47 '#interrupt-cells': 48 const: 3 49 50required: 51 - compatible 52 - reg 53 - interrupt-controller 54 - '#interrupt-cells' 55 56additionalProperties: false 57 58allOf: 59 - if: 60 properties: 61 compatible: 62 contains: 63 const: nvidia,tegra20-ictlr 64 then: 65 properties: 66 reg: 67 maxItems: 4 68 69 - if: 70 properties: 71 compatible: 72 contains: 73 const: nvidia,tegra30-ictlr 74 then: 75 properties: 76 reg: 77 minItems: 5 78 maxItems: 5 79 80 - if: 81 properties: 82 compatible: 83 contains: 84 const: nvidia,tegra210-ictlr 85 then: 86 properties: 87 reg: 88 minItems: 6 89 maxItems: 6 90 91examples: 92 - | 93 interrupt-controller@60004000 { 94 compatible = "nvidia,tegra20-ictlr"; 95 reg = <0x60004000 64>, 96 <0x60004100 64>, 97 <0x60004200 64>, 98 <0x60004300 64>; 99 interrupt-controller; 100 #interrupt-cells = <3>; 101 }; 102