xref: /linux/Documentation/devicetree/bindings/interrupt-controller/marvell,cp110-icu.yaml (revision 55a42f78ffd386e01a5404419f8c5ded7db70a21) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7maintainers:
8  - Miquel Raynal <miquel.raynal@bootlin.com>
9  - Thomas Petazzoni <thomas.petazzoni@bootlin.com>
10
11title: Marvell ICU Interrupt Controller
12
13description:
14  The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for
15  collecting all wired-interrupt sources in the CP and communicating them to the
16  GIC in the AP. The unit translates interrupt requests on input wires to MSG
17  memory mapped transactions to the GIC. These messages access different GIC
18  memory areas depending on their type (NSR, SR, SEI, REI, etc).
19
20properties:
21  compatible:
22    const: marvell,cp110-icu
23
24  reg:
25    maxItems: 1
26
27  '#address-cells':
28    const: 1
29
30  '#size-cells':
31    const: 1
32
33  ranges: true
34
35patternProperties:
36  "^interrupt-controller@":
37    type: object
38    description: Interrupt group child nodes
39    additionalProperties: false
40
41    properties:
42      compatible:
43        enum:
44          - marvell,cp110-icu-nsr
45          - marvell,cp110-icu-sr
46          - marvell,cp110-icu-sei
47          - marvell,cp110-icu-rei
48
49      reg:
50        maxItems: 1
51
52      '#address-cells':
53        const: 0
54
55      '#interrupt-cells':
56        const: 2
57
58      interrupt-controller: true
59
60      msi-parent:
61        maxItems: 1
62        description: Phandle to the GICP controller
63
64    required:
65      - compatible
66      - reg
67      - '#interrupt-cells'
68      - interrupt-controller
69      - msi-parent
70
71required:
72  - compatible
73  - reg
74
75additionalProperties: false
76
77examples:
78  - |
79    interrupt-controller@1e0000 {
80        compatible = "marvell,cp110-icu";
81        reg = <0x1e0000 0x440>;
82        #address-cells = <1>;
83        #size-cells = <1>;
84        ranges;
85
86        interrupt-controller@10 {
87                compatible = "marvell,cp110-icu-nsr";
88                reg = <0x10 0x20>;
89                #interrupt-cells = <2>;
90                interrupt-controller;
91                msi-parent = <&gicp>;
92        };
93
94        interrupt-controller@50 {
95                compatible = "marvell,cp110-icu-sei";
96                reg = <0x50 0x10>;
97                #interrupt-cells = <2>;
98                interrupt-controller;
99                msi-parent = <&sei>;
100        };
101    };
102