1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7maintainers: 8 - Miquel Raynal <miquel.raynal@bootlin.com> 9 - Thomas Petazzoni <thomas.petazzoni@bootlin.com> 10 11title: Marvell ICU Interrupt Controller 12 13description: 14 The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for 15 collecting all wired-interrupt sources in the CP and communicating them to the 16 GIC in the AP. The unit translates interrupt requests on input wires to MSG 17 memory mapped transactions to the GIC. These messages access different GIC 18 memory areas depending on their type (NSR, SR, SEI, REI, etc). 19 20properties: 21 compatible: 22 const: marvell,cp110-icu 23 24 reg: 25 maxItems: 1 26 27 '#address-cells': 28 const: 1 29 30 '#size-cells': 31 const: 1 32 33 ranges: true 34 35patternProperties: 36 "^interrupt-controller@": 37 type: object 38 description: Interrupt group child nodes 39 additionalProperties: false 40 41 properties: 42 compatible: 43 enum: 44 - marvell,cp110-icu-nsr 45 - marvell,cp110-icu-sr 46 - marvell,cp110-icu-sei 47 - marvell,cp110-icu-rei 48 49 reg: 50 maxItems: 1 51 52 '#interrupt-cells': 53 const: 2 54 55 interrupt-controller: true 56 57 msi-parent: 58 maxItems: 1 59 description: Phandle to the GICP controller 60 61 required: 62 - compatible 63 - reg 64 - '#interrupt-cells' 65 - interrupt-controller 66 - msi-parent 67 68required: 69 - compatible 70 - reg 71 72additionalProperties: false 73 74examples: 75 - | 76 interrupt-controller@1e0000 { 77 compatible = "marvell,cp110-icu"; 78 reg = <0x1e0000 0x440>; 79 #address-cells = <1>; 80 #size-cells = <1>; 81 ranges; 82 83 interrupt-controller@10 { 84 compatible = "marvell,cp110-icu-nsr"; 85 reg = <0x10 0x20>; 86 #interrupt-cells = <2>; 87 interrupt-controller; 88 msi-parent = <&gicp>; 89 }; 90 91 interrupt-controller@50 { 92 compatible = "marvell,cp110-icu-sei"; 93 reg = <0x50 0x10>; 94 #interrupt-cells = <2>; 95 interrupt-controller; 96 msi-parent = <&sei>; 97 }; 98 }; 99