1*26c70ec8SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*26c70ec8SRob Herring (Arm)%YAML 1.2 3*26c70ec8SRob Herring (Arm)--- 4*26c70ec8SRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml# 5*26c70ec8SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*26c70ec8SRob Herring (Arm) 7*26c70ec8SRob Herring (Arm)maintainers: 8*26c70ec8SRob Herring (Arm) - Miquel Raynal <miquel.raynal@bootlin.com> 9*26c70ec8SRob Herring (Arm) - Thomas Petazzoni <thomas.petazzoni@bootlin.com> 10*26c70ec8SRob Herring (Arm) 11*26c70ec8SRob Herring (Arm)title: Marvell ICU Interrupt Controller 12*26c70ec8SRob Herring (Arm) 13*26c70ec8SRob Herring (Arm)description: 14*26c70ec8SRob Herring (Arm) The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for 15*26c70ec8SRob Herring (Arm) collecting all wired-interrupt sources in the CP and communicating them to the 16*26c70ec8SRob Herring (Arm) GIC in the AP. The unit translates interrupt requests on input wires to MSG 17*26c70ec8SRob Herring (Arm) memory mapped transactions to the GIC. These messages access different GIC 18*26c70ec8SRob Herring (Arm) memory areas depending on their type (NSR, SR, SEI, REI, etc). 19*26c70ec8SRob Herring (Arm) 20*26c70ec8SRob Herring (Arm)properties: 21*26c70ec8SRob Herring (Arm) compatible: 22*26c70ec8SRob Herring (Arm) const: marvell,cp110-icu 23*26c70ec8SRob Herring (Arm) 24*26c70ec8SRob Herring (Arm) reg: 25*26c70ec8SRob Herring (Arm) maxItems: 1 26*26c70ec8SRob Herring (Arm) 27*26c70ec8SRob Herring (Arm) '#address-cells': 28*26c70ec8SRob Herring (Arm) const: 1 29*26c70ec8SRob Herring (Arm) 30*26c70ec8SRob Herring (Arm) '#size-cells': 31*26c70ec8SRob Herring (Arm) const: 1 32*26c70ec8SRob Herring (Arm) 33*26c70ec8SRob Herring (Arm) ranges: true 34*26c70ec8SRob Herring (Arm) 35*26c70ec8SRob Herring (Arm)patternProperties: 36*26c70ec8SRob Herring (Arm) "^interrupt-controller@": 37*26c70ec8SRob Herring (Arm) type: object 38*26c70ec8SRob Herring (Arm) description: Interrupt group child nodes 39*26c70ec8SRob Herring (Arm) additionalProperties: false 40*26c70ec8SRob Herring (Arm) 41*26c70ec8SRob Herring (Arm) properties: 42*26c70ec8SRob Herring (Arm) compatible: 43*26c70ec8SRob Herring (Arm) enum: 44*26c70ec8SRob Herring (Arm) - marvell,cp110-icu-nsr 45*26c70ec8SRob Herring (Arm) - marvell,cp110-icu-sr 46*26c70ec8SRob Herring (Arm) - marvell,cp110-icu-sei 47*26c70ec8SRob Herring (Arm) - marvell,cp110-icu-rei 48*26c70ec8SRob Herring (Arm) 49*26c70ec8SRob Herring (Arm) reg: 50*26c70ec8SRob Herring (Arm) maxItems: 1 51*26c70ec8SRob Herring (Arm) 52*26c70ec8SRob Herring (Arm) '#interrupt-cells': 53*26c70ec8SRob Herring (Arm) const: 2 54*26c70ec8SRob Herring (Arm) 55*26c70ec8SRob Herring (Arm) interrupt-controller: true 56*26c70ec8SRob Herring (Arm) 57*26c70ec8SRob Herring (Arm) msi-parent: 58*26c70ec8SRob Herring (Arm) maxItems: 1 59*26c70ec8SRob Herring (Arm) description: Phandle to the GICP controller 60*26c70ec8SRob Herring (Arm) 61*26c70ec8SRob Herring (Arm) required: 62*26c70ec8SRob Herring (Arm) - compatible 63*26c70ec8SRob Herring (Arm) - reg 64*26c70ec8SRob Herring (Arm) - '#interrupt-cells' 65*26c70ec8SRob Herring (Arm) - interrupt-controller 66*26c70ec8SRob Herring (Arm) - msi-parent 67*26c70ec8SRob Herring (Arm) 68*26c70ec8SRob Herring (Arm)required: 69*26c70ec8SRob Herring (Arm) - compatible 70*26c70ec8SRob Herring (Arm) - reg 71*26c70ec8SRob Herring (Arm) 72*26c70ec8SRob Herring (Arm)additionalProperties: false 73*26c70ec8SRob Herring (Arm) 74*26c70ec8SRob Herring (Arm)examples: 75*26c70ec8SRob Herring (Arm) - | 76*26c70ec8SRob Herring (Arm) interrupt-controller@1e0000 { 77*26c70ec8SRob Herring (Arm) compatible = "marvell,cp110-icu"; 78*26c70ec8SRob Herring (Arm) reg = <0x1e0000 0x440>; 79*26c70ec8SRob Herring (Arm) #address-cells = <1>; 80*26c70ec8SRob Herring (Arm) #size-cells = <1>; 81*26c70ec8SRob Herring (Arm) ranges; 82*26c70ec8SRob Herring (Arm) 83*26c70ec8SRob Herring (Arm) interrupt-controller@10 { 84*26c70ec8SRob Herring (Arm) compatible = "marvell,cp110-icu-nsr"; 85*26c70ec8SRob Herring (Arm) reg = <0x10 0x20>; 86*26c70ec8SRob Herring (Arm) #interrupt-cells = <2>; 87*26c70ec8SRob Herring (Arm) interrupt-controller; 88*26c70ec8SRob Herring (Arm) msi-parent = <&gicp>; 89*26c70ec8SRob Herring (Arm) }; 90*26c70ec8SRob Herring (Arm) 91*26c70ec8SRob Herring (Arm) interrupt-controller@50 { 92*26c70ec8SRob Herring (Arm) compatible = "marvell,cp110-icu-sei"; 93*26c70ec8SRob Herring (Arm) reg = <0x50 0x10>; 94*26c70ec8SRob Herring (Arm) #interrupt-cells = <2>; 95*26c70ec8SRob Herring (Arm) interrupt-controller; 96*26c70ec8SRob Herring (Arm) msi-parent = <&sei>; 97*26c70ec8SRob Herring (Arm) }; 98*26c70ec8SRob Herring (Arm) }; 99