xref: /linux/Documentation/devicetree/bindings/interrupt-controller/hisilicon,mbigen-v2.yaml (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/hisilicon,mbigen-v2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Hisilicon mbigen v2
8
9maintainers:
10  - Wei Xu <xuwei5@hisilicon.com>
11
12description: >
13  Mbigen means: message based interrupt generator.
14
15  MBI is kind of msi interrupt only used on Non-PCI devices.
16
17  To reduce the wired interrupt number connected to GIC, Hisilicon designed
18  mbigen to collect and generate interrupt.
19
20  Non-pci devices can connect to mbigen and generate the interrupt by writing
21  ITS register.
22
23properties:
24  compatible:
25    const: hisilicon,mbigen-v2
26
27  reg:
28    maxItems: 1
29
30required:
31  - compatible
32  - reg
33
34additionalProperties:
35  type: object
36  additionalProperties: false
37
38  properties:
39    interrupt-controller: true
40
41    '#interrupt-cells':
42      const: 2
43
44    msi-parent:
45      maxItems: 1
46
47    num-pins:
48      description: The total number of pins implemented in this Mbigen instance.
49      $ref: /schemas/types.yaml#/definitions/uint32
50
51  required:
52    - interrupt-controller
53    - "#interrupt-cells"
54    - msi-parent
55    - num-pins
56
57examples:
58  - |
59    mbigen@c0080000 {
60        compatible = "hisilicon,mbigen-v2";
61        reg = <0xc0080000 0x10000>;
62
63        mbigen_gmac: intc_gmac {
64            interrupt-controller;
65            #interrupt-cells = <2>;
66            msi-parent = <&its_dsa 0x40b1c>;
67            num-pins = <9>;
68        };
69
70        mbigen_i2c: intc_i2c {
71            interrupt-controller;
72            #interrupt-cells = <2>;
73            msi-parent = <&its_dsa 0x40b0e>;
74            num-pins = <2>;
75        };
76    };
77