1*2235e494SStanimir Varbanov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*2235e494SStanimir Varbanov%YAML 1.2 3*2235e494SStanimir Varbanov--- 4*2235e494SStanimir Varbanov$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml# 5*2235e494SStanimir Varbanov$schema: http://devicetree.org/meta-schemas/core.yaml# 6*2235e494SStanimir Varbanov 7*2235e494SStanimir Varbanovtitle: Broadcom bcm2712 MSI-X Interrupt Peripheral support 8*2235e494SStanimir Varbanov 9*2235e494SStanimir Varbanovmaintainers: 10*2235e494SStanimir Varbanov - Stanimir Varbanov <svarbanov@suse.de> 11*2235e494SStanimir Varbanov 12*2235e494SStanimir Varbanovdescription: 13*2235e494SStanimir Varbanov This interrupt controller is used to provide interrupt vectors to the 14*2235e494SStanimir Varbanov generic interrupt controller (GIC) on bcm2712. It will be used as 15*2235e494SStanimir Varbanov external MSI-X controller for PCIe root complex. 16*2235e494SStanimir Varbanov 17*2235e494SStanimir VarbanovallOf: 18*2235e494SStanimir Varbanov - $ref: /schemas/interrupt-controller/msi-controller.yaml# 19*2235e494SStanimir Varbanov 20*2235e494SStanimir Varbanovproperties: 21*2235e494SStanimir Varbanov compatible: 22*2235e494SStanimir Varbanov const: brcm,bcm2712-mip 23*2235e494SStanimir Varbanov 24*2235e494SStanimir Varbanov reg: 25*2235e494SStanimir Varbanov items: 26*2235e494SStanimir Varbanov - description: Base register address 27*2235e494SStanimir Varbanov - description: PCIe message address 28*2235e494SStanimir Varbanov 29*2235e494SStanimir Varbanov "#msi-cells": 30*2235e494SStanimir Varbanov const: 0 31*2235e494SStanimir Varbanov 32*2235e494SStanimir Varbanov brcm,msi-offset: 33*2235e494SStanimir Varbanov $ref: /schemas/types.yaml#/definitions/uint32 34*2235e494SStanimir Varbanov description: Shift the allocated MSI's. 35*2235e494SStanimir Varbanov 36*2235e494SStanimir VarbanovunevaluatedProperties: false 37*2235e494SStanimir Varbanov 38*2235e494SStanimir Varbanovrequired: 39*2235e494SStanimir Varbanov - compatible 40*2235e494SStanimir Varbanov - reg 41*2235e494SStanimir Varbanov - msi-controller 42*2235e494SStanimir Varbanov - msi-ranges 43*2235e494SStanimir Varbanov 44*2235e494SStanimir Varbanovexamples: 45*2235e494SStanimir Varbanov - | 46*2235e494SStanimir Varbanov #include <dt-bindings/interrupt-controller/arm-gic.h> 47*2235e494SStanimir Varbanov 48*2235e494SStanimir Varbanov axi { 49*2235e494SStanimir Varbanov #address-cells = <2>; 50*2235e494SStanimir Varbanov #size-cells = <2>; 51*2235e494SStanimir Varbanov 52*2235e494SStanimir Varbanov msi-controller@1000130000 { 53*2235e494SStanimir Varbanov compatible = "brcm,bcm2712-mip"; 54*2235e494SStanimir Varbanov reg = <0x10 0x00130000 0x00 0xc0>, 55*2235e494SStanimir Varbanov <0xff 0xfffff000 0x00 0x1000>; 56*2235e494SStanimir Varbanov msi-controller; 57*2235e494SStanimir Varbanov #msi-cells = <0>; 58*2235e494SStanimir Varbanov msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>; 59*2235e494SStanimir Varbanov }; 60*2235e494SStanimir Varbanov }; 61