xref: /linux/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm2712-msix.yaml (revision 4f9786035f9e519db41375818e1d0b5f20da2f10) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm2712-msix.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom bcm2712 MSI-X Interrupt Peripheral support
8
9maintainers:
10  - Stanimir Varbanov <svarbanov@suse.de>
11
12description:
13  This interrupt controller is used to provide interrupt vectors to the
14  generic interrupt controller (GIC) on bcm2712. It will be used as
15  external MSI-X controller for PCIe root complex.
16
17allOf:
18  - $ref: /schemas/interrupt-controller/msi-controller.yaml#
19
20properties:
21  compatible:
22    const: brcm,bcm2712-mip
23
24  reg:
25    items:
26      - description: Base register address
27      - description: PCIe message address
28
29  "#msi-cells":
30    const: 0
31
32  brcm,msi-offset:
33    $ref: /schemas/types.yaml#/definitions/uint32
34    description: Shift the allocated MSI's.
35
36unevaluatedProperties: false
37
38required:
39  - compatible
40  - reg
41  - msi-controller
42  - msi-ranges
43
44examples:
45  - |
46    #include <dt-bindings/interrupt-controller/arm-gic.h>
47
48    axi {
49        #address-cells = <2>;
50        #size-cells = <2>;
51
52        msi-controller@1000130000 {
53            compatible = "brcm,bcm2712-mip";
54            reg = <0x10 0x00130000 0x00 0xc0>,
55                  <0xff 0xfffff000 0x00 0x1000>;
56            msi-controller;
57            #msi-cells = <0>;
58            msi-ranges = <&gicv2 GIC_SPI 128 IRQ_TYPE_EDGE_RISING 64>;
59        };
60    };
61